Commit graph

893,362 commits

Author SHA1 Message Date
Isaac J. Manjarres
48a845e5f6 ion: Use a freezable unbound workqueue for the memory prefetch work items
The prefetch work items currently use the system unbounded
workqueue for prefetching/draining memory for a secure VMID. The
execution of either operation can overlap with system suspend and
can block the later phases of the system suspend flow (e.g. waiting
for all available CPUs to go idle) if these operations take a long
amount of time.

Since the prefetch and drain operations involve manipulating the
S2 page tables and can take a long time based on the amount of memory
that is being hyp assigned, use a freezable unbound workqueue. Using
a freezable workqueue allows for outstanding prefetch works to be
processed at the beginning of the system suspend flow, when workqueues
are being frozen, and subsequent prefetch works are processed after
system resume, when workqueues are thawed. This prevents blocking
the later phases of system suspend, where CPUs should quickly
go to idle.

Change-Id: Iedcee6a565b5c871ceb7173c2b48ec3136aa44e1
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-12-11 05:37:05 -08:00
Zhiqiang Tu
9c7d617b7c ANDROID: ABI: Update allowed list for QCOM
Leaf changes summary: 0 artifact changed
Changed leaf types summary: 0 leaf type changed
Removed/Changed/Added functions summary: 0 Removed, 0 Changed, 0 Added function
Removed/Changed/Added variables summary: 0 Removed, 0 Changed, 0 Added variable

Bug: 175333697
Change-Id: I03fa6c2d6f71d266ee2352728bf7858b673d2215
Signed-off-by: Zhiqiang Tu <ztu@codeaurora.org>
2020-12-11 13:03:00 +00:00
Vivek Kumar
c8da086d6b defconfig: gen3auto: Enable SLPI pinctrl driver for SA8155
Enable SLPI pin-control driver for SA8155 chipset.

Change-Id: I403157f3a145a3149e105ea9c21222ddfe5d0475
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
2020-12-11 18:16:34 +05:30
Vivek Kumar
1f46e62d77 pinctrl: qcom: add pinctrl driver for SLPI
Sensor Low Power Island (SLPI) has a Pin controller which can
support 14 pin configurations, add pinctrl driver to handle
pins of SLPI from APPS. The snapshot of this driver is taken
from msm-4.14 commit "e4483b491ed60".

Change-Id: Id44ccb34f23a285edf0eaccb501ba4d2296a7b87
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
2020-12-11 18:14:25 +05:30
Odelu Kukatla
56a31c4cad interconnect: qcom: Enable real interconnect provider for Yupik
Introduce Qualcomm Yupik specific real provider driver using the
interconnect framework. Also add sync_state for interconenct
provider driver.

Change-Id: Ifd61a5d1d8eb1fb532b865d128b14ae673a1acdf
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
2020-12-11 04:42:17 -08:00
Naveen Yadav
44f93a1134 interconnect: qcom: Add interconnect provider driver for SDXNIGHTJAR
Introduce Qualcomm SDXNIGHTJAR specific provider driver using
the interconnect framework.

Change-Id: I40a3ca16f0c0e298e247f950ad7c282784d5c440
Signed-off-by: Naveen Yadav <naveenky@codeaurora.org>
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
2020-12-11 17:25:28 +05:30
Akash Asthana
7481a0b168 Platform: msm-geni-se: Geni drivers shouldn't crash without ICC support
Ideally GENI drivers shouldn't fail or crash if ICC entries are missing
from the DT node or CONFIG_INTERCONNECT is disabled. Most of the ICC APIs
returns success in such scenarios.

Since we have maintained our own wrapper for most of the ICC interaction
for ex: rmv_ab_ib/add_ab_ib/resources_init mostly due to QUP core clock
behaviour. So, let's bail out from these APIs if ICC entry is missing
in DT node. In future we can move ICC registration to probe to simplify
more.

Also, remove the obsolete iommu related code.

Change-Id: I48bec3d2a95ad53f2c2008e60be645ed829354ca
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
2020-12-11 17:23:49 +05:30
Naveen Yadav
6078439ddd icc: dt-bindings: add endpoint IDs for interconnects for NIGHTJAR
Add master and slave ID constants for all Qualcomm Technologies, Inc.
SDXNIGHTJAR interconnect providers which consumers can use to set
bandwidth constraints and find paths in the NoC (Network-On-Chip)
topology.

Change-Id: I8a85be61764bd6874fb881e9f53666c30ada37da
Signed-off-by: Naveen Yadav <naveenky@codeaurora.org>
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
2020-12-11 17:14:17 +05:30
Odelu Kukatla
ad1d7eb34e arm64: defconfig: Enable interconnect driver for YUPIK
Enable interconnect driver so that consumers are able to
obtain their path handles properly.

Change-Id: I88d34f8d959216b3e8ac412761b76e389a6ee868
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
2020-12-11 17:05:54 +05:30
Kavya Nunna
7ed1c2b05e defconfig: Enable rpm-smd and qti_regulator option for sdxnightjar
Enable rpm-smd regulator and qti_regulator for sdxnightjar,
to support regulators inside pmics which are controlled by the
RPM processor.

Change-Id: I898e8d0984d1322e9f2f120e6fc03b030616f1f3
Signed-off-by: Kavya Nunna <knunna@codeaurora.org>
2020-12-11 13:31:12 +05:30
Lingutla Chandrasekhar
c4e372d1f3 Revert "topology: Add snapshot of possible sibling cpu mask changes"
Cpu possible sibling cpu mask is only used by WALT for its cluster
population. And WALT is directly getting the cpu possible sibling mask.

So remove this unused cpu mask support by reverting commit:
'6df025a02c49f65("topology: Add snapshot of possible sibling
cpu mask changes")'.

Change-Id: If65842a37cad95e8b52425a1397d12c32a95dc1e
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
2020-12-10 19:22:29 -08:00
Prakash Gupta
3dc5f30d19 ion: use correct section map size for LPAE
Use correct section map size for LPAE. At present ion use
CONFIG_IOMMU_IO_PGTABLE_ARMV7S to determine whether to use LPAE or short
descriptor section size.  This is insufficient. Check for CONFIG_64bit and
CONFIG_LPAE as well to decide correct section size.

Change-Id: If730d98da110ebb338f7f1affccaae28c0c58a9e
Signed-off-by: Prakash Gupta <guptap@codeaurora.org>
2020-12-11 06:26:49 +05:30
qctecmdr
aa860b5b17 Merge "usb: f_gsi: Send zero length packet for MBIM/GPS on cable connect" 2020-12-10 16:11:03 -08:00
qctecmdr
fdf6a38b66 Merge "msm: kgsl: Properly walk the list of timeline signals in a aux command" 2020-12-10 16:11:03 -08:00
Siddartha Mohanadoss
4b67f1c72e defconfig: Enable MHI device for sdxlemur
Enable MHI device for sdxlemur to enable mobile
broadband interface module support.

Change-Id: I95bd0690ab6f137e98f620023cc4955cdd78759f
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
2020-12-10 15:06:22 -08:00
Siddartha Mohanadoss
748b7ed021 defconfig: Enable PCIe end point device for sdxlemur
Enable PCIe EP controller for sdxlemur to enable mobile
broadband interface module support.

Change-Id: I173acc946da74700c3195f9c16eeceaf9eacb46d
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
2020-12-10 15:06:22 -08:00
Raghavendra Rao Ananta
2ad8428a8b soc: qcom: socinfo: Add support for SM8325 platforms
Add the soc-id info related to the SM8325 platforms to the
soc_id table.

Change-Id: Idb3b83bcfd4ddb6d8fd72b783a6dceb8c6cc2687
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2020-12-10 13:57:56 -08:00
Jordan Crouse
a8e0225571 msm: kgsl: Properly walk the list of timeline signals in a aux command
Commit 36b196ce5c ("msm: kgsl: Add software timelines") didn't properly
advance the user source pointer while walking the incoming list of timeline
signals in an aux commmand which resulted in only the first listed timeline
getting signaled.

Fixes: 36b196ce5c ("msm: kgsl: Add software timelines")
Change-Id: Ic0dedbad400f276abea6b368421ccdcef1645b9e
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-12-10 14:06:05 -07:00
qctecmdr
46105a7401 Merge "mtd: msm_qpic_nand: Workaround to get the correct density for JSC part" 2020-12-10 11:38:52 -08:00
qctecmdr
016be0999a Merge "Revert "scsi: ufs: Increase ah8 idle to 10ms"" 2020-12-10 11:38:51 -08:00
qctecmdr
f7390a26b1 Merge "defconfig: Enable new file encryption framework" 2020-12-10 11:38:51 -08:00
qctecmdr
3d160e50f2 Merge "iommu: arm-smmu: skip tlb flush during unmap" 2020-12-10 11:38:51 -08:00
qctecmdr
3848433c36 Merge "phy: ufs: add UFS PHY support for SM8150 platform" 2020-12-10 11:38:51 -08:00
qctecmdr
96d15d544e Merge "netfilter: x_tables: Switch synchronization to RCU" 2020-12-10 11:38:50 -08:00
qctecmdr
f16a9db54f Merge "iommu/arm-smmu: Update the implementation defined page number macros" 2020-12-10 11:38:50 -08:00
Mathias Nyman
b6af6bd091 xhci: Add tracing for xhci doorbell register writes
Trace when a register in the doorbell array is written,
both for host controller command doorbell and device doorbells,
including for which endpoint and stream

Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Link: https://lore.kernel.org/r/1573836603-10871-3-git-send-email-mathias.nyman@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Git-commit: 58b9d71a0f55e2514211875553dd092f74dc2cbc
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Change-Id: If691d971a72b243c7d78f8f83d644227d57da4fe
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-12-10 09:21:19 -08:00
qctecmdr
1297536962 Merge "usb: dwc3: core: Destroy ipc log context on remove" 2020-12-10 06:46:25 -08:00
qctecmdr
324146f8ba Merge "mm/madvise: remove racy mm ownership check" 2020-12-10 06:46:25 -08:00
qctecmdr
4f0abb7427 Merge "dm verity: skip verity work on I/O errors when system is shutting down" 2020-12-10 06:46:25 -08:00
qctecmdr
7c3f466a36 Merge "input: qcom-hv-haptics: fix out of bound of FIFO samples array" 2020-12-10 06:46:24 -08:00
qctecmdr
37093a2edd Merge "firmware: qcom: tzbsp_diag info not required for qsee_log" 2020-12-10 06:46:24 -08:00
qctecmdr
c81a2b0920 Merge "arm64: defconfig: Enable CRYPTO_SHA1_ARM64_CE algorithm" 2020-12-10 06:46:23 -08:00
qctecmdr
3e35a068a5 Merge "msm: pcie: Disable access to PARF register when link is disabled" 2020-12-10 06:46:23 -08:00
qctecmdr
f274bc425e Merge "defconfig: msm-5.4: Adding sfe support to sdxlemur target" 2020-12-10 06:46:23 -08:00
qctecmdr
609dff6223 Merge "defconfig: Enable new file encryption framework" 2020-12-10 06:46:22 -08:00
qctecmdr
32473be6ee Merge "mmc: core: Add partial initialization support" 2020-12-10 06:46:22 -08:00
qctecmdr
2ae503d752 Merge "defconfig: Enable Novatek NT36xxx Touch for yupik target" 2020-12-10 06:46:21 -08:00
Kamal Agrawal
db072e5fb6 msm: kgsl: Fix IFPC abort due to preemption keepalive
Consider a scenario when preemption timer expires and while re-checking
preemption status in _a6xx_preemption_fault, if preemption is successful,
the state is transitioned to complete state. When dispatcher is scheduled,
it calls _a6xx_preemption_done. Here, we are not clearing preemption
keepalive bit which will prevent GMU to enter into IFPC state. Fix it by
clearing this bit. Similar situation can happen when we receive preempt
interrupt with non-zero status.

Change-Id: I7f2e5a139be766b363bc8d1941b1c6006e6a9ffd
Signed-off-by: Kamal Agrawal <kamaagra@codeaurora.org>
2020-12-10 17:32:50 +05:30
Phanindra Babu Pabba
25117d2ee0 defconfig: Enable new file encryption framework
Following flags are needed to support block crypto
based inline encryption framework on eMMC devices:

1. CONFIG_MMC_CQHCI_CRYPTO
2. CONFIG_MMC_CQHCI_CRYPTO_QTI.

Change-Id: Ic87330eaa1e95d7347a13d631bb5c0c734b92d2c
Signed-off-by: Phanindra Babu Pabba <pabba@codeaurora.org>
2020-12-10 16:19:20 +05:30
Taniya Das
ac4f243b08 clk: qcom: Add debug cc clk measure nodes for SDXNIGHTJAR
Add debug cc measure nodes for sdxnightjar to support
debugfs clk measure.

Change-Id: I39e83037da825ea2e6ea528e7681f731dd8e93f6
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-12-10 02:09:01 -08:00
Taniya Das
2efad4a713 clk: qcom: gcc: Add support for GCC clock Driver for SDXNIGHTJAR
Add support for global clock controller for peripheral clock
clients to be able to request for the clocks.

Change-Id: Id3c04d43dfc16344ad7f9f751c74f134d90e07a1
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-12-10 15:35:05 +05:30
Nitin Rawat
b16f5839ec Revert "scsi: ufs: Increase ah8 idle to 10ms"
There is some power impact seen with autohibern8 idle
timer value of 10ms. Hence reverting back the autohiber8 timer
value back to 5ms.

This reverts commit ef3f24dd1c.

Change-Id: Ic2f97e6f53e1711a869c9617e15c06e53d1e2e33
Signed-off-by: Nitin Rawat <nitirawa@codeaurora.org>
2020-12-10 15:19:00 +05:30
Anmolpreet Kaur
810db21f77 qseecom: add CONFIG_COMPAT condition
Compile compat_qseecom_ioctl only if
CONFIG_COMPAT is enabled.

Change-Id: I334b0bccdaa30815ea17becdc086aa590d517f75
Signed-off-by: Anmolpreet Kaur <anmolpre@codeaurora.org>
2020-12-10 14:26:59 +05:30
Krishna Konda
adac87eab9 mtd: Collect bad block count for ecc stats lazily
Normally bad block counts for ECC stats are collected
during boot time. This can be done lazily when the
ECCGETSTATS ioctl is invoked on the partition.

This can significantly decrease boot time, depending
on the size of the partition. Also rescanning on every
ioctl invocation helps in having the latest bad block count
rather than depending on the count that is collected during boot.

Change-Id: I43d7a769a1d4ef769823d0b5bbe132adb474f892
Signed-off-by: Murali Palnati <palnatim@codeaurora.org>
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
Signed-off-by: Nikhilesh Reddy <reddyn@codeaurora.org>
Signed-off-by: Pradeep P V K <ppvk@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
2020-12-10 13:32:28 +05:30
Isaac J. Manjarres
2c04df9e33 dma-buf: Introduce dma_buf_put_sync()
dma_buf_put() is supposed to invoke the release dma-buf callback for
a dma-buf and free the memory when the dma-buf's refcount reaches 0.
However, when dma_buf_put() is invoked from a kernel thread (e.g.
kthread or kworker), the dma-buf is actually freed later on in time,
asynchronously, by a worker thread.

This behavior can cause issues where memory is allocated from an ION
heap, such as a CMA heap, and released from the context of a worker
thread, and the memory is allocated soon after the call to
dma_buf_put(). In that case, it is possible for the memory to not have
been freed yet.

Thus, introduce dma_buf_put_sync(), which ensures that the buffer is
freed when the function is called, and the buffer does not have any
outstanding references.

Change-Id: Iba63c968b16669013684861afd60c0212062412e
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-12-10 00:01:55 -08:00
Isaac J. Manjarres
9a64d016e5 soc: qcom: mem-buf: Fix message processing race condition
mem-buf currently uses a workqueue with multiple worker threads
associated with it for handling allocation requests and reclaiming
memory. This can cause overlaps in time where an allocation request
can overlap with memory reclaim.

This is not ideal, as the memory allocation request may fail if the
memory that is supposed to have been reclaimed has not been reclaimed
yet. Thus, use an ordered workqueue to make sure that there is no
overlap between processing allocation and memory reclaim messages.

Change-Id: I4a76c74b1785d2448c6c2f97a43efaa5bf6ad99a
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-12-10 00:01:54 -08:00
Huang Yiwei
87d5e4a8c3 pstore: Add buffer start check during init
The missing check to prz->start can cause crash because it
can be any value and used to locate the write position, so
add the start check to avoid.

Change-Id: If8ed4db8d9dafab656dd5793aed597463fab628d
Signed-off-by: Huang Yiwei <hyiwei@codeaurora.org>
2020-12-10 15:38:51 +08:00
Kamal Agrawal
3da05bbbb6 msm: kgsl: Disable BCL feature on A660
There is a glitch in BCL. Disable BCL feature on A660
to prevent any issues.

Change-Id: I3bdfacac3c95dcf0ff2116f746b95f5c4958e15b
Signed-off-by: Kamal Agrawal <kamaagra@codeaurora.org>
2020-12-10 12:53:26 +05:30
Naina Mehta
c90be90928 defconfig: msm: Enable ARCH_YUPIK for genericarmv8
Enable Yupik arch on generic arm v8 defconfig.

Change-Id: Ia7f2ecdf507d27a07a14aec50d91e53198cf116b
Signed-off-by: Naina Mehta <nainmeht@codeaurora.org>
2020-12-10 12:34:39 +05:30
Rakesh Kota
6ecc69fb75 defconfig: Enable gcc/rpm-smd/debugCC clock drivers for sdxnightjar
Enable gcc/rpm-smd/debugcc clock drivers to support clock peripherals.

Change-Id: I64c82e468a5874ac8a97dc2558746fa2d21fb969
Signed-off-by: Rakesh Kota <kotarake@codeaurora.org>
2020-12-10 12:31:34 +05:30