During lp2 state the load on the panel and
controller regulators can be reduced. Configure ldos
in optimum mode during this state.
Change-Id: I75c180f28f636ebb23ecbe9679ba89c00977fe0f
Signed-off-by: osaisruj <osaisruj@codeaurora.org>
In dual display usecase when both displays comes out of
idle following scenario will cause wr_ptr timeout.
1. Both displays goes to idle and RSCC enters Mode-2.
2. Primary display exit idle upon DRM commit N RSC
enters Solver State.
3. Secondary display exits idle upon DRM commit M and
waits on input fence after CTL_1_PREPARE is set.
RSC is still in CMD state.
4. Primary Commit N frame transfer got successful and
commit N+1 is queued in primary display when RSC
in solver state which leads to timeout in primary.
This is because RSCC will not generate a wakeup in sync with
primary timelines leading to timeout. This is because RSCC
still sees idle low thinking frame transfer is taking long
time. This change will switch the rsc state to AMC mode
before CTL_PREPARE is set which resolves such issue.
Change-Id: Ic32e48b4febbbcc54d94876194d38fe6ef3d0981
Signed-off-by: Mahadevan <mahap@codeaurora.org>
This change adds required checks to avoid accessing null pointer
where debug bus is not initialised and dumping the debug bus points.
Change-Id: Ia46a4b95706f05e37be660f006c04b1e2e9f6848
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
Currently, disabled timing child nodes or power supply nodes are
not skipped because of which status = "disabled" entry does not
work for child nodes. Use of_get_next_available_child to skip
disabled child nodes.
Change-Id: Ib6e4b655f83dd0ee3ffddd496976c34030fa3dc0
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
This change is updated to address use after free and null checks
in QPIC display driver.
Change-Id: I97f1d941de69aad3d49cbf0c9782022b8f7db840
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
In debugfs_esd_trigger_check, display mutex is not unlocked in error
scenario which may lead to deadlock. This change adds fix to handle this.
Change-Id: I44d78959630a49bd1e9dcf871cfc108ac43232db
Signed-off-by: Srihitha Tangudu <tangudu@codeaurora.org>
Clear partial update mask during last close to avoid
rounded corner to be programmed without valid mask during
shell stop/start operations.
Change-Id: I378adc62b5bc5913abfc32fa3528c8e28ea273d4
Signed-off-by: Anjaneya Prasad Musunuri <aprasad@codeaurora.org>
To ensure that set merge_mode after vlut and hist enable, move merge_mode
enable from ltm_init to ltm_vlut.
Redefine the OP_MASK of LTM_INIT_ENABLE and LTM_VLUT_ENABLE, in order to
write the merge_mode bits correctly.
Change-Id: I5258e7f545e265b114098e46d31986274127e962
Signed-off-by: Ping Li <pingli@codeaurora.org>
Signed-off-by: Yuchao Ma <yuchaom@codeaurora.org>
In dual display during bootup, panel prefill lines may be used in
configuring rscc static wakeup due to ongoing autorefresh in secondary
display. Due to this, there can be a case when transfer time for the
commit is greater than the static wakeup calculated when panel has
large prefill lines(vbp + vpw + vfp) causing janks on primary when
secondary display enters idle and primary display is running. Add changes
to use default_prefill_lines for configuring static wakeup during bootup
when rsc is in clk state. For vid state only, panel prefill
lines will be taken into account for rsc static wakeup calculation.
Change-Id: I3c0ceec984b24b81e3e4d0341f25cdd28f178925
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
This change adds required checks to avoid accessing the
null pointer in case where memory allocation fails while
dumping the registers in memory.
Change-Id: Ic087a1bd041d193820289672d325a78795c48c14
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
During gem fault, if aspace value is found to be NULL
pages map request will be failed. This change assigns
nonsecure aspace to gem object before mapping the pages
in such cases.
Change-Id: Ia838fd8a446e21771742ec9d51e30fe08c989e6e
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Currently, PLL_CFG1(1:0) register is updated with cached values
in dsi_pll_enable. This can create issue when UEFI and kernel
cfg1 programming is not same. To fix it, return cached value
of cfg1 when its read in pclk_mux_read, so that pclk_mux_write
is called and cached value is updated. This fix is for 10nm pll.
Change-Id: I8465cb9027a1639f3cdeb02274513ac680f84632
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Remove idle time from the Qsync calculation, round down to
the nearest multiple of 4 and remove a couple of extra lines
to compensate for possible latencies. This helps to reduce
the possibility of causing tearing due to the driver calculation
mismatching with the DDIC's expected timeout value.
Change-Id: I8a53a989e26cbd7f0e2b94caa8df8f5bee3ad26c
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Update the dump_mem pointer offset while storing the debugbus
data for the second DSI to avoid overwriting to same memory.
As part of the change, register the DSI ctrl with sde_dbg from
ctrl_init directly, instead of debugfs_init to avoid code replication.
Change-Id: I4089f3038ffa89136eaea956d27270f638a99043
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
Add a flag SDE_DBG_DUMP_IN_LOG_LIMITED based on which the debug bus
registers dumped in log can be limited. In memory logging will continue
to dump the full range of configured registers if that flag is set.
Currently the in-log limited support is enabled only for the sde/vbif
debugbus and both IN_LOG & IN_LOG_LIMITED will be treated the same way
for other blocks.
Change-Id: Ie85d3d16955cfa507bb3e02954d9b313851eef78
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
Add macros for logging the registers/debugbus, so all blocks
can use the same macros to keep the log format consistent.
Change-Id: Ie28ce83a742f24f3091bedab66c8cf1454bbb943
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Refactor the debugbus read/logging for sde/dsi/vbif/lutdma to use the
same helpers. Use function pointers to read/write specific hw block
operations. Remove the DBGBUS_FLAGS_DSPP and related checks as it is
not used. Increase the debugbus block/test-point ranges for all the
blocks to log all the test-points used by hardware.
Change-Id: I07b23d21f9c556eb7575b892f87ab94adfe41116
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
In the current code, vmlock is always acquired in check
phase even if there is no transition between vm's. This
might result in janks if vmlock is held concurrently by
other processes such as backlight update. This change
ensures that vmlock is held only if there is a valid
transition request between vm's in check phase.
Change-Id: I022f04c19ba04fdd5494580cc1436747620b9354
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
When qsync is enabled, if there is a large start threshold
window, there might be a case where two frame transfers
could happen in single TE period if second frame trigger
start is issued within the window and could cause tearing
on the screen. This change adds a atomic variable to detect
multiple frame count and adds vsync wait in such cases to
fix this issue. This variable will be set whenever
wr_ptr_irq arrives and will be reset during rd_ptr_irq.
Change-Id: Ice77b8a717a18d39d70dc08647e15b761ad1c126
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Add changes to avoid clone_mode encoder for detection of panel mode.
This allows cmd mode display to signal the release_fence right after
pp-done/wb-done interrupt and unblocks any input buffers waiting
on release_fence.
Change-Id: Id87e54f29c960e301d42d49d4763220e6e4cc6f5
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
Add changes to clear the cwb_enc_mask in sde_crtc_state post
phys_enc->in_clone_mode is set. This is required to avoid
race issues seen when cwb gets enabled in alternate commits.
Change-Id: I555cc0401b3200f7e8bcc6be8884d04cb3ce69fb
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
This change increases the size of KMS_INFO which helps
to accommodate large number of timing nodes for exposure
to userspace.
Change-Id: I32b1f47a32dba8ba62731e522fabd406b023ed69
Signed-off-by: Mahadevan <mahap@codeaurora.org>
Add changes to skip RM allocation during atomic_check for dsi connectors
which can have a seamless transition during CWB usecase. When CWB gets
enabled in alternate commits N, N+2 on dsi connectors there is back to
back connectors_changed modeset and poll gets enabled for the consecutive
commit N+1, N+3 on rsvp_nxt to get cleared. This rsvp_nxt will be cleared
on drm_atomic_state_put of commit N, N+2, hence atomic_check of commit N+1,
N+3 is blocked until this time causing commit failures.
Change-Id: I06f7a8d9dadb42b6d69201afeff099d554edd98e
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
If no planes are staged during non-secure to secure transition,
dim layer should be staged at the highest blend stage. Add
check to fail those commits where dim layer is not staged
in such scenarios.
Change-Id: Ifd49b00a8ff64547ea12751f6c765fd12e55629e
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
