Commit graph

858,613 commits

Author SHA1 Message Date
qctecmdr
9963fe6c8a Merge "defconfig: lahaina-gki: enable refgen regulator driver" 2019-10-08 23:11:50 -07:00
qctecmdr
f755b6b67f Merge "net: qrtr: Change port allocation to use cyclic idr" 2019-10-08 22:32:56 -07:00
qctecmdr
81b7681939 Merge "arm64: defconfig: Enable gcc clock driver for Lahaina" 2019-10-08 21:40:36 -07:00
qctecmdr
0468e66895 Merge "net: qrtr: Change node mutex to a rw_semaphore" 2019-10-08 21:00:30 -07:00
qctecmdr
13db81d1b0 Merge "msm: gsi: gsi 2.9 upgrade" 2019-10-08 20:16:25 -07:00
qctecmdr
f611892041 Merge "of: Make of_get_ddrtype module friendly" 2019-10-08 19:24:26 -07:00
qctecmdr
2810686555 Merge "soc: qcom: Add a config flag to know the build variant" 2019-10-08 18:40:12 -07:00
Chris Lew
06809f9816 net: qrtr: Change port allocation to use cyclic idr
There is a race for clients that open sockets before the control port
is bound. If a client gets an idr that was allocated before the control
port is bound, there is a chance the previous address owner sent lookup
packets to the control port. The new address owner will get residual
responses to this the lookup packets.

Change the idr_alloc to idr_alloc_cyclic so new idr's are allocated
instead of trying to reuse the freed idrs.

Change-Id: Ie1bda7a818309503f80542e739bac646327296f7
Signed-off-by: Chris Lew <clew@codeaurora.org>
2019-10-07 16:50:11 -07:00
Chris Lew
5e6fd7cda2 net: qrtr: Change node mutex to a rw_semaphore
There is a chance for a remote processor to become unresponsive while
QRTR is trying to broadcast a control message. This results in the node
lock being held for an extended period of time and prevents node lookup
which is needed to send messages.

Change the mutex to a rw_semaphore to allow concurrency during node
lookups and broadcasts.

Change-Id: I2e3fdde22edaac64f164cf08900e9d09b16c380d
Signed-off-by: Chris Lew <clew@codeaurora.org>
2019-10-07 16:50:11 -07:00
Chris Lew
01b08fdd53 net: qrtr: Add socket mode optimization
A remote endpoint should not need to know when a client socket is freed
if the socket never established commnication with the endpoint. Add a
mode to keep track of which endpoints a socket communicates with.

There are three modes a socket can be in:
	INIT   - Socket has not sent anything or only local messages,
		 only send client close to local services.

	SINGLE - Socket has sent messages to a single ept, send event
		 to this single ept.

	MULTI  - Socket has sent messages to multiple epts, broadcast
		 release of this socket.

Server state changes should be broadcast throughout the system. Change
the ipc state of a port when it sends a NEW SERVER control packet. This
ensures the DEL CLIENT control packet is propagated correctly for
servers.

This change squashes the following commits from msm-4.14:
  commit 3373eb77cd6d ("net: qrtr: Add socket mode optimization")
  commit d984a2d6f150 ("net: qrtr: Make servers multi state ports")

In addition, fix minor format issues.

Change-Id: I416742cff598bf7aa9da2baa2e86a53b18367870
Signed-off-by: Chris Lew <clew@codeaurora.org>
2019-10-07 16:50:11 -07:00
Chris Lew
94869df328 net: qrtr: Do not send packets before hello negotiation
There is a race where broadcast packets can be sent to a node that has
not sent the hello message to the remote processor. This breaks the
protocol expectation. Add a status variable to track when the hello
packet has been sent.

An alternative solution attempted was to remove the nodes from the
broadcast list until the hello packet is sent. This is not a valid
solution because hello messages are broadcasted if the ns is restarted
or started late. There needs to be a status variable separate from the
broadcast list.

This change squashes the following commits from msm-4.14:
  commit abd3961d05be ("qrtr: Only broadcast to initialized nodes")
  commit 90cb0e473226 ("net: qrtr: Do not send packets before Hello
                        negotiation")
  commit 07abd1abe803 ("net: qrtr: Fix hello packet drop memory leak")

In addition, fix minor format issues.

Change-Id: I2a55e587f324e64e2bde4ea634de66008f190de1
Signed-off-by: Chris Lew <clew@codeaurora.org>
2019-10-07 16:49:48 -07:00
qctecmdr
c4787643fa Merge "net: qrtr: Align header and payload" 2019-10-07 15:20:46 -07:00
qctecmdr
7f16200f1c Merge "soc: qcom: qmi_interface: Protect sk_user_data with RCU" 2019-10-07 14:24:19 -07:00
qctecmdr
226b72604a Merge "pinctrl: qcom: Add EGPIO feature support to pinctrl driver" 2019-10-04 19:27:42 -07:00
Prasad Sodagudi
49d73826d0 pinctrl: qcom: Add EGPIO feature support to pinctrl driver
Island IO can be assigned to Apps TLMM dynamically
if that island is not using the pin for any connectivity.
Add support for enabling EGPIO feature if the pin can
support it. EGPIO_PRESENT bit shows if EGPIO feature
is present or not for particular pin. Once EGPIO_ENABLE
bit is set the pin is now controlled by Apps TLMM.
When pinctrl properties are getting initialized by device
driver framework, pin functions select would call to
msm_pinmux_set_mux function to select pin function and
enable EGPIO.

Change-Id: I64514904096286f2a5df351880cd56d753f0658f
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2019-10-04 15:55:36 -07:00
qctecmdr
7ca8fd6d83 Merge "defconfig: Add MSM Core Hang Detection as module" 2019-10-04 14:58:57 -07:00
Bojun Pan
54f5b081c1 msm: gsi: gsi 2.9 upgrade
Driver upgrade for GSI v2.9.

Change-Id: I5d148ead27499e6571196bc320c60da1e727163d
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-10-04 12:19:55 -07:00
Bojun Pan
76a1edce0e msm: ipa: Configure IPA pipes and group resources for Lahaina IPA 4.9
Lahaina uses different pipe endpoint mappings and group resources.
This change captures these configurations.

Change-Id: Ib45848bb52d9a6680b38b4305cbab38c0b00e7d2
Acked-by: Priyadarshini Rajagopal <prajagop@qti.qualcomm.com>
Signed-off-by: Bojun Pan <bojunp@codeaurora.org>
2019-10-04 12:19:50 -07:00
Chris Lew
6edb7067ed net: qrtr: Align header and payload
Remote IPC Router drivers expect the received packet to be aligned.
This case is only exposed using the MHI transport because it does not
ensure the packet will be received as one chunk like RPMSG GLINK.

Change-Id: I0e5c27e3c5896e6721c8bbbfcda29551f0968626
Signed-off-by: Chris Lew <clew@codeaurora.org>
2019-10-04 11:27:35 -07:00
Bjorn Andersson
881e2c3278 net: qrtr: Remove receive worker
Rather than enqueuing messages and scheduling a worker to deliver them
to the individual sockets we can now, thanks to the previous work, move
this directly into the endpoint callback.

This saves us a context switch per incoming message and removes the
possibility of an opportunistic suspend to happen between the message is
coming from the endpoint until it ends up in the socket's receive
buffer.

Change-Id: I7177fa36f9d7cc7e5de5f24975f15284ef1fcc80
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Patch-mainline: linux-arm-kernel @ 07/05/19, 23:06
Signed-off-by: Chris Lew <clew@codeaurora.org>
2019-10-04 11:27:35 -07:00
Chris Lew
8695691608 soc: qcom: qmi_interface: Protect sk_user_data with RCU
sk_user_data can be protected with RCU instead of calling the callback
rwlock. RCU will ensure the pointer obtained in qmi_data_ready is
formed properly and cleanup can synchronize before continuing in handle
release.

Change-Id: I6a687bd7b311fe169a89cb959ae755730b81a9f1
Signed-off-by: Chris Lew <clew@codeaurora.org>
2019-10-04 11:27:27 -07:00
Prakruthi Deepak Heragu
7a418dae79 soc: qcom: Add a config flag to know the build variant
Add a Kconfig flag to differentiate between a GKI and an Non GKI build.
CONFIG_QGKI is enabled if the build is a Non GKI variant (QGKI or debug).
This flag doesn't differentiate between QGKI and debug variants.

Change-Id: I6b53b1e0e4c071fc7d9b365ff374ffe4e8b3e8ba
Signed-off-by: Prakruthi Deepak Heragu <pheragu@codeaurora.org>
2019-10-04 10:36:02 -07:00
qctecmdr
bbb789f449 Merge "irqchip: qcom-pdc: Add IPC logging support" 2019-10-04 10:35:50 -07:00
qctecmdr
d9f382896a Merge "serial: msm_geni_serial:Add snapshot of serial UART driver" 2019-10-04 00:05:49 -07:00
qctecmdr
ca6ceb9883 Merge "irqchip: qcom-pdc: add irqchip set/get state calls" 2019-10-03 23:03:38 -07:00
Raghavendra Rao Ananta
414587c7f9 of: Make of_get_ddrtype module friendly
The APIs fdt_path_offset() and fdt_getprop_w() are not exported.
As a result, drivers that are compiled as modules cannot directly
use them. Hence, switch to of_find_node_by_path() and
of_property_read_u32() to achive the same functionality while also
being module friendly.

Change-Id: I90b299c60b60a006d0932442549c5d5a20cf2ea0
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
2019-10-03 17:15:33 -07:00
Isaac J. Manjarres
8ba9def729 soc: qcom: secure_buffer: Fix secure buffer device initialization
Ensure that the secure buffer device is set only if dma_set_mask()
occurs successfully.

Change-Id: I9b84692b2860bafd8fe645b95e05d6436698d840
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-10-03 14:53:01 -07:00
qctecmdr
23e1365ce8 Merge "iommu/arm-smmu: Fix context fault interrupt test" 2019-10-03 14:00:20 -07:00
qctecmdr
7a21e4007b Merge "iommu: iommu-debug: check valid pfn before performing ATOS ops" 2019-10-03 13:17:48 -07:00
qctecmdr
03ea966837 Merge "iommu/arm-smmu: Adopt bitfield model for remaining SMMU registers" 2019-10-03 12:39:41 -07:00
qctecmdr
1578f1693e Merge "ARM: smp: export pending IPI state" 2019-10-03 11:51:41 -07:00
qctecmdr
0bd47772b8 Merge "iommu/arm-smmu: Add reset implementation hook" 2019-10-03 10:39:24 -07:00
qctecmdr
7da1ef4b30 Merge "iommu/arm-smmu: Move Secure access quirk to implementation" 2019-10-03 10:00:03 -07:00
qctecmdr
da9d4994d3 Merge "iommu/arm-smmu: Rename arm-smmu-regs.h" 2019-10-03 09:16:24 -07:00
Isaac J. Manjarres
5c502c5c3c iommu/arm-smmu: Fix context fault interrupt test
Fix the context fault interrupt test so that it can use
the abstracted context bank read/write routines.

Change-Id: I58ba80bd5e96b1cbcc68d5f8bc16150e9d335226
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-10-03 09:03:43 -07:00
Isaac J. Manjarres
a71e0d6b6a iommu/arm-smmu: Use bitfields for the TBU debug registers
Migrate to using bitfields for the TBU debug registers.

Change-Id: Iac1321784969018a3ad8757bcafbcb986c58be76
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2019-10-03 09:03:37 -07:00
qctecmdr
88623cbbdd Merge "usb: dwc3: qcom: Use GDSC regulator if available" 2019-10-03 08:31:49 -07:00
Akash Asthana
6d7a4ec947 serial: msm_geni_serial:Add snapshot of serial UART driver
This snapshot is taken as of msm-4.19 'commit <c01ec6b5c60a8>'
'("geni-qcom-se: Reduce the ab of QUP Core2x clock")'.

Change-Id: Ia40e9d48bca27bb253cbf73ad9fcde9d087820d3
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
2019-10-03 19:18:17 +05:30
Akash Asthana
f0450c1149 platform: msm: Add snapshot of GENI serial engine driver
This snapshot taken as of msm-4.19 'commit <5d5df09fbdf5>'
'("qcom_geni_se: Add a check in QUP common driver to vote for BW")'
GENI serial engine driver provides common functionality used by
other serial bus drivers (such as I2c, SPI, UART), and does
resource management for those drivers. Add ICC API support also.

Change-Id: I088457bbfa654253f7afe797ea3f89f63d06e823
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
2019-10-03 19:17:14 +05:30
qctecmdr
b5d0ace88f Merge "regulator: add verbose error messages for invalid voltage requests" 2019-10-02 19:16:13 -07:00
David Collins
85a85aada0 regulator: add verbose error messages for invalid voltage requests
Add error messages into the regulator_check_voltage() and
regulator_check_consumers() functions which explain exactly what
is not correct about given voltage requests.  This makes
debugging regulator_set_voltage() errors easier.

Change-Id: I8b3ec8d6a78c94b436b57bd2228b8bd5c362cecd
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-10-02 18:22:14 -07:00
qctecmdr
c78315c521 Merge "defconfig: lahaina-gki: enable rpmh-regulator driver" 2019-10-02 18:08:32 -07:00
qctecmdr
0adc799684 Merge "iommu/arm-smmu: Abstract context bank accesses" 2019-10-02 17:32:25 -07:00
Jack Pham
ae9ad6b5c6 usb: dwc3: qcom: Use GDSC regulator if available
GDSC can be specified as a regulator in device tree as
'USB3_GDSC-supply'. If present, use it and enable it
prior to enabling the clocks.

Change-Id: I50c056dd920b457fe77fd364414657e98413f4d0
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2019-10-02 17:28:02 -07:00
qctecmdr
a75e17c39a Merge "iommu/arm-smmu: Get rid of weird "atomic" write" 2019-10-02 16:59:17 -07:00
qctecmdr
b39f25a096 Merge "iommu/arm-smmu: Rework cb_base handling" 2019-10-02 16:23:24 -07:00
qctecmdr
8063c4d617 Merge "net: qrtr: Make qrtr_port_lookup() use RCU" 2019-10-02 15:47:38 -07:00
qctecmdr
c415245873 Merge "iommu/arm-smmu: Convert GR1 registers to bitfields" 2019-10-02 15:14:20 -07:00
David Collins
ad6cbdcb54 defconfig: lahaina-gki: enable refgen regulator driver
Enable the refgen regulator driver so that consumers can manage
the south refgen state.

Change-Id: I136a6fb5911dd6cc9f1a89c47f27c42f4d7ec0fc
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-10-02 15:09:50 -07:00
David Collins
3a66e73ed4 regulator: add refgen regulator driver
Some Qualcomm Technologies, Inc. SoCs such as SDM845 utilize
reference bias generators for various internal PHY blocks.  These
are called REFGENs.  Add a driver to support REFGEN so that
consumers can vote based upon their runtime hardware needs.

Change-Id: I60681273cc1f9842844968bf4f0f682cdd28eb0d
Signed-off-by: David Collins <collinsd@codeaurora.org>
2019-10-02 15:07:53 -07:00