Commit graph

1,016 commits

Author SHA1 Message Date
Mohammed Mirza Mandayappurath Manzoor
a6bb5bb0a1 ARM: dts: msm: Update ddr bandwidth levels for A660
Update available ddr frequencies for each power level to optimize
performance per watt.

Change-Id: I5bd4b49b49ddc369902c03c2dd141f8cf8f5fb70
2020-04-14 09:34:30 -07:00
qctecmdr
230630d6ba Merge "dt-bindings: interconnect: add interconnect bindings" 2020-04-09 04:56:29 -07:00
qctecmdr
5ca27100cc Merge "ARM: dts: msm: Add cdsp rpmsg entry in Lahaina" 2020-04-09 04:56:29 -07:00
qctecmdr
d94a708261 Merge "ARM: dts: msm: Remove NFC I3C DT node for Lahaina" 2020-04-09 04:56:29 -07:00
qctecmdr
4bbb66b47a Merge "ARM: dts: msm: Add IMEM entry for Shima" 2020-04-09 04:56:29 -07:00
Gaurav Singhal
fe74818d16 ARM: dts: msm: Remove NFC I3C DT node for Lahaina
Remove device node of NFC I3C for MTP, CDP and QRD platforms.

Change-Id: I73f2661bf436b42054893e94dd004a2667fb1148
2020-04-09 01:57:04 -07:00
qctecmdr
f99558c8ed Merge "ARM: dts: msm: add proxy consumers for L2B and L1C regulators on Lahaina" 2020-04-08 23:18:57 -07:00
qctecmdr
62f97fe736 Merge "ARM: dts: msm: Add "regulator-allow-set-load" for PM8350B IBB regulator" 2020-04-08 19:18:56 -07:00
qctecmdr
fef3cd6637 Merge "ARM: dts: msm: Set no-status-check-on-disable for Lahaina PCIe GDSCs" 2020-04-08 19:18:56 -07:00
qctecmdr
6e8bf32d39 Merge "ARM: dts: msm: Add USB nodes for Shima" 2020-04-08 19:18:56 -07:00
qctecmdr
b851d4e70d Merge "ARM: dts: msm: Add pinctrl for PM8350C GPIO 9 on Lahaina platforms" 2020-04-08 03:42:48 -07:00
Odelu Kukatla
d0cb180085 dt-bindings: interconnect: add interconnect bindings
Add interconnect device bindings. These devices can be used
to describe any RPMH and NoC based interconnect devices.

Change-Id: Ic490e7a88f3d74f169ebad8b3b8884c3ac3e4d8d
2020-04-08 10:19:43 +05:30
qctecmdr
6707681f20 Merge "ARM: dts: msm: add subsystem restart (SSR) for PMIC Glink on Lahaina" 2020-04-07 18:49:48 -07:00
qctecmdr
07c66451b3 Merge "ARM: dts: msm: Update ufs bus vote for Lahaina" 2020-04-07 18:49:48 -07:00
qctecmdr
cfaacfd454 Merge "ARM: dts: msm: remove aux devices" 2020-04-07 18:49:48 -07:00
qctecmdr
e0e724cbc0 Merge "dt-bindings: thermal: Add documentation for CPU voltage cooling device" 2020-04-07 18:49:48 -07:00
Chandra Sai Chidipudi
7fafc152e4 ARM: dts: msm: Add IMEM entry for Shima
Add entry for system IMEM to read or write various
system level configurations.

Change-Id: I5489b7eccdd8a3a1d7357ea947ac3d7df4e767a6
2020-04-05 23:33:19 -07:00
qctecmdr
9fbf9f5f31 Merge "dt-bindings: net: Add bindings for qcom,qrtr-haven" 2020-04-05 07:27:26 -07:00
qctecmdr
1631e7ad92 Merge "ARM: dts: msm: Add the mem-buf device for Lahaina" 2020-04-05 07:27:26 -07:00
qctecmdr
28c5ea1f0c Merge "dt-bindings: usb: Add Gen2 Tx Compliance tuning property for dwc3" 2020-04-05 07:27:26 -07:00
qctecmdr
4ab56b369d Merge "ARM: dts: msm: Increase the dwc3 reg address range for Lahaina" 2020-04-05 07:27:26 -07:00
qctecmdr
ddef505daf Merge "dt-bindings: LLCC: Add "qcom,shima-llcc" compatible property" 2020-04-04 10:08:51 -07:00
qctecmdr
bb4648d73b Merge "ARM: dts: msm: Disable tpdm ddr for lahaina" 2020-04-04 10:08:51 -07:00
qctecmdr
d813d1b8ab Merge "ARM: dts: msm: add capacity and DPC properties for Shima" 2020-04-04 10:08:51 -07:00
qctecmdr
8e89886020 Merge "ARM: dts: msm: Add device trees for LahainaP variant" 2020-04-04 01:02:02 -07:00
qctecmdr
8945e18fae Merge "ARM: dts: msm: Add pshold to Shima" 2020-04-03 15:20:01 -07:00
Elliot Berman
295665f6fd ARM: dts: msm: Add device trees for LahainaP variant
Add device tree support for LahainaP variant (no modem).

Change-Id: I9bafe2b27653041831bc424cbda1167f3948e65b
2020-04-03 11:13:28 -07:00
Elliot Berman
98303fba40 dt-bindings: msm: Add compatible strings for lahainap
Add compatible stings for lahainap.

Change-Id: I3412619f8423ef3ed4c0055f1041cc9e0c531efe
2020-04-03 11:13:13 -07:00
qctecmdr
86d7911d43 Merge "ARM: dts: msm: enable qmap flow control feature" 2020-04-03 09:15:56 -07:00
qctecmdr
c56d092a10 Merge "dt-bindings: clock: Add rpmh clock bindings for Shima" 2020-04-03 09:15:56 -07:00
qctecmdr
ce226b8768 Merge "ARM: dts: msm: Update the GSI gpii mask for lahaina" 2020-04-03 09:15:56 -07:00
Pavankumar Kondeti
d56318ef3f ARM: dts: msm: add capacity and DPC properties for Shima
The "capacity-dmips-mhz" and "dynamic-power-coefficient" are
used to build Energy Model which in turn used by EAS to take
placement decisions.

Change-Id: Ia44ffe4fcb799663c4bb47eb18f1ac79952ed12d
2020-04-03 15:47:31 +05:30
Shyam Kumar Thella
de93ed778a ARM: dts: msm: Add "regulator-allow-set-load" for PM8350B IBB regulator
Add the DT property "regulator-allow-set-load" for PM8350B IBB
regulator device that is required to support some consumer APIs.

Change-Id: I0a54c4bb7b4e3b6234d36072041ee78fde4774d5
2020-04-03 10:10:52 +05:30
Chandra Sai Chidipudi
f3bd9d19e0 dt-bindings: LLCC: Add "qcom,shima-llcc" compatible property
Add "qcom,shima-llcc" compatible property which matches
the driver for Shima platform.

Change-Id: Ie0711695459cd59574b4ca9e4cf3f049b5618544
2020-04-03 09:50:03 +05:30
Asutosh Das
d40f2fd7a5 ARM: dts: msm: Update ufs bus vote for Lahaina
Update the bus vote of gear-3 and gear-4 to actual
needed bandwidth.

Change-Id: Ideda07a0fead0fc9413356b77d380648fd690329
2020-04-02 16:18:17 -07:00
Pratham Pratap
0f4eb65a97 ARM: dts: msm: Add USB nodes for Shima
Add USB nodes to support USB in peripheral mode on
simulation platforms for Shima.

Change-Id: I9ea4cded7b55293a12a9d0305cc3d210f20780ec
2020-04-03 01:48:25 +05:30
Ram Chandrasekar
1c33eb3004 dt-bindings: thermal: Add documentation for CPU voltage cooling device
Add documentation for CPU voltage cooling device. CPU voltage cooling
device will provide support to apply CPU frequency mitigation on the
different CPUs in a cluster to achieve a reduction in cluster voltage.
This is achieved by building a mitigation table mapping the CPU
frequency levels to a voltage.

Change-Id: I41a222c54442bdc065267f1f1cf079118b8032e9
2020-04-02 09:17:16 -07:00
Mao Jinlong
f62264a76b ARM: dts: msm: Disable tpdm ddr for lahaina
Disable tpdm ddr to avoid register access issue.

Change-Id: Ie7a0922f3d7b09d2c75005d5393576dd424a0e2a
2020-04-02 05:51:44 -07:00
Bavyasritha Alahari
63ec4acbf8 ARM: dts: msm: Add cdsp rpmsg entry in Lahaina
CDSPRM module relies on the rpmsg node to create a communication
channel with CDSP. The node also carries information for Cx i-peak
limit management, CPU QoS voting, HVX, CDSP thermal mitigation
frameworks.
CDSPRM module implements a RPMSG interface to communicate with CDSP
while providing a way for CDSP to vote for CPU L3 clock, CPU QoS to
benefit CDSP applications performance. The module also implements
an interface with NPU for Cx i-peak limit management and registers
cooling devices for CDSP and HVX thermal mitigation.
Documentation for device tree bindings related to CDSPRM.

Change-Id: I0f79ebcfcd2e6a2366f755278ae2c5f6bc1b8199
2020-04-02 18:19:32 +05:30
qctecmdr
12f20880a6 Merge "ARM: dts: msm: Add core hang detection to dt for Shima" 2020-04-02 05:43:11 -07:00
qctecmdr
3b1ab8a602 Merge "ARM: dts: msm: Move qbt_handler to soc" 2020-04-02 05:43:11 -07:00
qctecmdr
78d6cd5f39 Merge "Revert "ARM: dts: msm: Clean-up vidc DT node"" 2020-04-02 05:43:11 -07:00
qctecmdr
7b01ccb46e Merge "ARM: dts: msm: Add support for ION for the trusted-VM" 2020-04-02 05:43:11 -07:00
Elson Roy Serrao
d1992a3331 dt-bindings: usb: Add Gen2 Tx Compliance tuning property for dwc3
Tuning for Tx 3.1 Gen2 needs to be done by modifiying the deemph
registers. Expose these registers via device tree properties so that
tuning can be applied duing dwc3 init.

Change-Id: I84066e976ccbd6006ca9149e29d1c27acb694646
2020-04-01 15:56:21 -07:00
qctecmdr
f0227e9ddd Merge "ARM: dts: msm: use 'dma-coherent-hint-cached' for fastrpc nodes" 2020-04-01 13:43:11 -07:00
Elson Roy Serrao
9844984a79 ARM: dts: msm: Increase the dwc3 reg address range for Lahaina
The register address range for Lahaina is not covering all the
controller registers. Tuning the Tx deemph registers for dwc3
gen2 protocol test is not possible with the current range.
Modify the reg property to cover the entire range as defined in
the data book to fix this issue.

Change-Id: I34b605f920af7cae8b2efd69a54f96e8cde5c001
2020-04-01 11:50:45 -07:00
Mihir Ganu
b55a6ef70a Revert "ARM: dts: msm: Clean-up vidc DT node"
This reverts commit 789a5cb2fd.

Change-Id: I59c3a194bcafbe4d5e36c6a847ecc8a661722915
2020-04-01 09:30:46 -07:00
qctecmdr
28ac5c4ad8 Merge "Revert "dt-bindings: msm: vidc: Clean-up dt properties"" 2020-04-01 02:51:02 -07:00
Shyam Kumar Thella
fa75c5c485 ARM: dts: msm: Add pinctrl for PM8350C GPIO 9 on Lahaina platforms
Output of PWM channel 4 is used for external backlight control of
display panel. Add pinctrl configuration for PM8350C GPIO 9 such that
it is capable of outputting PWM 4's output. This pinctrl configuration
is used by display driver for external backlight control.

Change-Id: Ie9e1a1bf02d8caecde61861dc4528fa0f414a995
2020-04-01 14:45:30 +05:30
Mukesh Ojha
d0179ec286 ARM: dts: msm: Add pshold to Shima
Add pshold node to Shima devicetree.

Change-Id: Ifaf3c87e4a4fd334952801298700113e8bd5ed71
2020-04-01 14:35:39 +05:30