A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Author SHA1 Message Date
qctecmdr
cda462d600 Merge "ARM: dts: msm: Updates V2 memory map for Shima" 2020-08-16 05:04:35 -07:00
qctecmdr
bac708db85 Merge "ARM: dts: msm: Do not disable modem PIL for Lahaina APQ" 2020-08-16 05:04:35 -07:00
qctecmdr
5a6e934799 Merge "ARM: dts: msm: Add pm qos dt entries for sdcard" 2020-08-16 02:32:34 -07:00
qctecmdr
079d79d59b Merge "ARM: dts: msm: Add gpu gaming bin support for holi" 2020-08-15 07:11:21 -07:00
qctecmdr
959d1c957f Merge "ARM: dts: qcom: Update bus votes for DDR5" 2020-08-15 07:11:21 -07:00
qctecmdr
2ac81c29c7 Merge "ARM: dts: msm: Change the SMPS2C max-voltage to 0.95V for shima" 2020-08-13 10:28:12 -07:00
qctecmdr
9d1c0028f7 Merge "ARM: dts: msm: Add entry for non secure display heap memory" 2020-08-13 04:49:32 -07:00
qctecmdr
dfe5e75250 Merge "ARM: dts: msm: Add device tree for Shima for IDPS with digital mics" 2020-08-13 04:49:32 -07:00
qctecmdr
6e22617270 Merge "ARM: dts: msm: Add PM qos and regulator dt entry for ufs" 2020-08-12 08:31:56 -07:00
qctecmdr
a105c8e036 Merge "ARM: dts: msm: Update SPI SE4 to select a static GPII number" 2020-08-12 08:31:56 -07:00
qctecmdr
2ec7d60476 Merge "ARM: dts: msm: Add DTSI entry to handle PA conf" 2020-08-12 08:31:56 -07:00
qctecmdr
16fd1654b1 Merge "ARM: dts: msm: Enable qsee drivers for shima" 2020-08-12 08:31:56 -07:00
Kiran Gunda
3ee451070b ARM: dts: msm: Change the SMPS2C max-voltage to 0.95V for shima 
Change the SMPS2C max-voltage from 0.925V to 0.95V as per the
HW recommendation.

Change-Id: I622bb85f3d67e687e6bbb5d0253ed997a285d90c
 2020-08-12 02:56:54 -07:00
qctecmdr
a14b1652ee Merge "ARM: dts: msm: Add flag to support cfgready signal bypass sw workaround" 2020-08-12 01:56:14 -07:00
qctecmdr
9ff64161ab Merge "ARM: dts: msm: add DCVS nodes for shima target" 2020-08-12 01:56:14 -07:00
qctecmdr
666e7de93c Merge "ARM: dts: msm: Add feature config node for qfprom for Shima" 2020-08-12 01:56:14 -07:00
qctecmdr
b0525a23aa Merge "ARM: dts: msm: Remove io-coherency support" 2020-08-12 01:56:14 -07:00
qctecmdr
d3d040b55c Merge "ARM: dts: msm: Add irq type value for IPA interrupts" 2020-08-12 01:56:14 -07:00
qctecmdr
e683db8c4a Merge "ARM: dts: msm: Add touch support for shima target" 2020-08-12 01:56:14 -07:00
qctecmdr
1660414788 Merge "ARM: dts: msm: fix for incorrect dt entries for holi" 2020-08-12 01:56:14 -07:00
qctecmdr
e9462460a4 Merge "ARM: dts: msm: Replace "qcom,cmb_msr_skip" with "qcom,cmb-msr-skip"" 2020-08-12 01:56:14 -07:00
Ritesh Kumar
770c95d0e5 ARM: dts: msm: Add touch support for shima target 
Add focaltech touch support for shima target.

Change-Id: Ice841f553e449dadd85d4d868a2929701ba44fc6
 2020-08-12 00:06:57 -07:00
Rajeev Nandan
5ff7cfded8 ARM: dts: msm: include display nodes to shima target 
This change includes display sde node and platform
specific nodes in the corresponding platform DT files
for Shima target.

Change-Id: Ia5e51ba2870b6bdcec8d9272217d596b09dd4ec9
 2020-08-12 00:04:38 -07:00
Santosh Mardi
e3c839b105 ARM: dts: msm: add DCVS nodes for shima target 
Add DCVS nodes to scale L3, LLCC and DDR based on the traffic
for shima target.

Change-Id: I129119f4ffb4b1c897ef2281eacab8ef21be05d2
 2020-08-11 21:33:50 -07:00
Ramkumar Radhakrishnan
5a26118c59 ARM: dts: msm: Add entry for non secure display heap memory 
1. Add entry to reserve 100 MB contiguous memory from non secure
   display heap to allocate demura buffers and image buffer for
   TUI use case
2. Allocated buffers from this heap will be exported to secondary
   VM to use it for composition during TUI session

Change-Id: I02df4631610099fbb7c01a716b4c2144db5c8722
 2020-08-11 17:03:40 -07:00
qctecmdr
52f57a24c4 Merge "ARM: dts: msm: Add eMMC/SD dt entries in platform files for holi" 2020-08-11 15:30:40 -07:00
qctecmdr
612e14e0f2 Merge "ARM: dts: msm: Add eMMC/SD dt entries in platform files for shima" 2020-08-11 15:30:40 -07:00
qctecmdr
35c355254b Merge "ARM: dts: msm: Adding IPA node for shima target" 2020-08-11 15:30:40 -07:00
qctecmdr
159ee9c1af Merge "ARM: dts: msm: add memory dump config for olympic" 2020-08-11 15:30:40 -07:00
qctecmdr
b305775323 Merge "dt-bindings: clock: Add rpmh clock bindings for sdxlemur" 2020-08-11 15:30:40 -07:00
Jishnu Prakash
877a218293 ARM: dts: msm: Correct PMR735B smb_skin_therm configuration 
Correct gpio configuration for PMR735B smb_skin_therm to
ensure it is read correctly.

Change-Id: Ica19c202358b6eacea2bcf2fa84bf942f862807d
 2020-08-10 21:02:28 -07:00
Raghavendra Rao Ananta
1e3e2c464b ARM: dts: msm: Do not disable modem PIL for Lahaina APQ 
There's a need to enable minimal location services to run on modem.
Hence, do not disable the modem PIL node such that the driver
is probed and capable enough to load the firmware.

Change-Id: Ibc01f1f7c6e92104492afb634a27a88a04970205
 2020-08-10 11:13:32 -07:00
Kaushal Kumar
5e590f6261 ARM: dts: msm: Add feature config node for qfprom for Shima 
Add feature config node for qfprom for reading fuse bits
to differentiate between Shima SoCs with feature supported
capabilities.

Change-Id: Ib629a7f610093202c7ff1320237b3c62ddf9725c
 2020-08-10 15:19:56 +05:30
Yuanfang Zhang
1e45cae72a ARM: dts: msm: Replace "qcom,cmb_msr_skip" with "qcom,cmb-msr-skip" 
Replace "qcom,cmb_msr_skip" with "qcom,cmb-msr-skip" since TPDM
driver identify the mark "qcom,cmb-msr-skip" in the end.

Change-Id: I9c4f7d36d6ff72572a5c763601292a84a4420674
 2020-08-09 22:34:36 -07:00
AnilKumar Chimata
5a76b398f4 ARM: dts: msm: Enable qsee drivers for shima 
Add device node entries on DT include file to enable
QSEECOM, SMCINVOKE, QRNG, qcedev, qcrypto, HWKM and
tzlog drivers for shima.

Change-Id: Ic9ba18a82066e702a861e038b6d48b5ec2011f4f
 2020-08-10 00:51:27 +05:30
Kiran Gunda
28a715c7b2 ARM: dts: qcom: Add L1D and remove L10B/L7F for shima 
Add pm8350b_l1(L1D) which is a supply rail for DDIC for OLEDB
display. Also remove pmr735B_l7(L7F) and pm8350_l10(L10B)
nodes as there is no VRM resource for these LDOs.

Change-Id: Ic6b5ee4fcf2a632d9e7e87468331e16d3e6d33d9
 2020-08-09 07:43:49 -07:00
Praveen Kurapati
37de271d60 ARM: dts: msm: Remove io-coherency support 
For holi target, io-coherency is not supported. So
remove the dma-coherent flag.

Change-Id: Icf12012d941298fb9d143c460d1846acae7724e7
 2020-08-07 21:43:02 +05:30
Praveen Kurapati
d606208c31 ARM: dts: msm: Add irq type value for IPA interrupts 
For handling IPA interrupts, add IRQ TYPE values in holi target.

Change-Id: I61c4a0491829d2b2294ea5f0b5cce2ff16e1c210
 2020-08-07 13:12:58 +05:30
Yuanfang Zhang
af96099a2e ARM: dts: msm: add memory dump config for olympic 
Add memory dump config on olympic.

Change-Id: I08562a5ea392668e18fcdea58a6ad7fe48db63b6
 2020-08-07 13:23:13 +08:00
qctecmdr
10409ef5a7 Merge "ARM: dts: msm: Add cvp device for shima" 2020-08-06 12:39:30 -07:00
qctecmdr
5b470b7f13 Merge "ARM: dts: msm: Remove the vddp-ref min voltage voting from DT" 2020-08-06 12:39:30 -07:00
qctecmdr
73dd79b99a Merge "ARM: dts: msm: Add fmax support for holi GPU" 2020-08-06 12:39:30 -07:00
Sarthak Garg
0a00a37a50 ARM: dts: msm: Add eMMC/SD dt entries in platform files for shima 
Add eMMC/SD dt entries for shima in platform dtsi files.

Change-Id: I7aea021c5f6dd3c6f26011b281f7aea60d6f5271
 2020-08-06 21:37:48 +05:30
Sarthak Garg
16a1986acf ARM: dts: msm: Disable eMMC for shima 
Disable eMMC for shima so that the bus speed mode changes can be made in
the main shima.dtsi file without breaking the shima RUMI as eMMC is not
needed for shima RUMI.

Change-Id: Ie94f812a025547981b1b31ae745f8ed292bcc660
 2020-08-06 21:33:12 +05:30
Sarthak Garg
208a3925c3 ARM: dts: msm: Add eMMC/SD dt entries in platform files for holi 
Add eMMC/SD dt entries for holi in platform dtsi files.

Change-Id: I935326532bcabcd4b00e329bb96ed54874109b16
 2020-08-06 21:26:38 +05:30
Sarthak Garg
d823e430d0 ARM: dts: msm: Disable eMMC for holi 
Disable eMMC for holi so that the bus speed mode changes can be made in
the main holi.dtsi file without breaking the holi RUMI as eMMC is not
needed for holi RUMI.

Change-Id: I751f2b0835791c7dad8cdb23857b252dddf607a9
 2020-08-06 21:16:47 +05:30
Nitin Rawat
bf051c2def ARM: dts: msm: Add PM qos and regulator dt entry for ufs 
Add PM qos and regulator dt entry for ufs.

Change-Id: I311802348d4bbc9308f1b8d68a8137814de5a86d
 2020-08-06 17:29:40 +05:30
Vangala, Amarnath
7597739374 ARM: dts: msm: fix for incorrect dt entries for holi 
Correction for bugs in few dtsi entries in audio overlay dtsi for holi.

Change-Id: I18418d00f25d38de7f856c78badcb5a753b5f472
 2020-08-06 16:20:16 +05:30
qctecmdr
c443f51173 Merge "ARM: dts: msm: add dcc node" 2020-08-06 03:32:48 -07:00
qctecmdr
02707362f0 Merge "ARM: dts: msm: enable l2wb feature for holi target" 2020-08-06 03:32:48 -07:00