Commit graph

894,770 commits

Author SHA1 Message Date
Ashish Chavan
8ca6692674 power: supply: qcom: Fix typo for SMB1351 config
Remove "battery.o" file from SMB1351 config to avoid
the linking issues when SMB1351 config is enabled.

Change-Id: Ia70d7f5d4fa12247542786785ebc303aba32d276
Signed-off-by: Ashish Chavan <ashichav@codeaurora.org>
2021-03-03 13:28:11 +05:30
Anant Goel
06a17a1ce0 defconfig: autogvm: Enable virtual subsystem notification driver
Enable the virtual subsystem notification driver on the Auto
virtual machine.

Change-Id: I4b46d42e2012effb2186cd4854d494f15c621bcc
Signed-off-by: Anant Goel <anantg@codeaurora.org>
2021-03-03 09:52:02 +05:30
Anant Goel
6ac037d40b defconfig: autogvm: Enable SMEM driver
Enable the Shared Memory (SMEM) driver on the Auto
virtual machine.

Change-Id: Ia2d043972e4e69b78cccb2a61206baf7fc60eb01
Signed-off-by: Anant Goel <anantg@codeaurora.org>
2021-03-03 09:50:51 +05:30
Santosh Dronamraju
a2c83dbd48 soc: qcom: spss_utils: Add support for legacy SPSS
The spss-util driver provides utilities required for the Secure
Processor Subsystem (SPSS). It provides the fuse state for key
selection and the SPSS HW version.
Legacy spss not support load spss by UEFI and also not support
CMAC/IAR feature.

Change-Id: Iea0d66ed66a2817850f99f74bf716d33db956812
Signed-off-by: Santosh Dronamraju <sdronamr@codeaurora.org>
2021-03-02 20:12:15 -08:00
Maulik Shah
3ad984c730 drivers: pinctrl: qcom: Correct the base address for sm8150
The direct connect registers base need to keep differently for
sm8150 since it used per tile registers in devicetree.

pinctrl driver does tile plus hmss base address for configuring
direct connect interrupts. Update the tile address to correctly
point to direct connect registers.

Change-Id: Ic959ed067be30dd457449e874298be30b696cd07
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
2021-03-03 09:18:07 +05:30
Fenglin Wu
f744ad78f7 input: qcom-hv-haptics: update LRA frequency detection sequence
Update following settings in LRA frequency detection sequence according
to HW recommendation:
  1) Increase to 6 drive cycles before enabling High-Z period for auto
     resonance config.
  2) Disable adaptive drive duty function.

Change-Id: I551974603c99fcdad5d38fdef6edf15746c0033e
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
2021-03-03 09:35:01 +08:00
Remil Ram
4b8306944e scripts: update gcc-wrapper to python3
adding python3 support to make it compatible with newer mdms

Change-Id: If0452676d2983b535d9564b81477e6f89c53fc70
Signed-off-by: Remil Ram <remilr@codeaurora.org>
2021-03-02 11:08:41 -08:00
Tushar Nimkar
a4b96484d0 drivers: qcom: Add new subsystem stats driver
This change adds subsystem sleep stats driver.
When userspace issues ioctl to read stats data, the driver
reads from smem and same passes to userspace.

Change-Id: Ia8ddb9096eb5f387922e8a7c0ad48ed71b736a85
Signed-off-by: Tushar Nimkar <tnimkar@codeaurora.org>
2021-03-02 23:07:33 +05:30
qctecmdr
f1a388a8da Merge "arm64: Kconfig: Add config option for Direwolf" 2021-03-02 08:39:44 -08:00
qctecmdr
d4ad0a9e02 Merge "defconfig: Enable TZ-log driver" 2021-03-02 08:39:43 -08:00
qctecmdr
bed5cfbbfb Merge "mm: cma: Print correct request pages" 2021-03-02 08:39:43 -08:00
Deepak Kumar
fde3eab781 msm: kgsl: Correct gfp mask passed to kvcalloc
Remove __GFP_NOWARN and __GFP_NORETRY gfp masks
from kvcalloc calls to avoid out of memory errors
because of not triggering shrinker in cases we are
in low memory situations.

Change-Id: I79936816f895d0f79c7620cda00114457893b349
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
2021-03-02 21:30:00 +05:30
Shreyas K K
ad22919e7a defconfig: Add required configs for sdmsteppeauto
Enable CONFIG_QCOM_KGSL and CONFIG_QCOM_KGSL_IOCOHERENCY_DEFAULT
to enable KGSL support.

Enable CONFIG_MSM_ADSPRPC, CONFIG_MSM_CDSP_LOADER, and
CONFIG_MSM_FASTCVPD to enable FastRPC on sdmsteppeauto.

Enable CONFIG_QCOM_SECURE_BUFFER to enable secure buffer
transactions.

Enable IOMMU related configs for fastmap, selftest, and other
related configs.

Change-Id: Id9665df61851d26d3113081d65e1807585d99f81
Signed-off-by: Shreyas K K <shrekk@codeaurora.org>
2021-03-02 19:58:40 +05:30
Maulik Shah
67f4ca01d3 pinctrl: qcom: Add support to disable gpio wakeup and direct connect
GPIOs that are in wakeirq_map have direct interrupt to GIC and they
do not use tlmm's summary irq. On certain devices its needed to
disable direct connect and gpio irq is not used for wakeup however
require to use tlmm's summary irq when device is awake.

Add support to list such gpios in target device tree and disable
wakeup and configure to not use direct connect interrupt.

Change-Id: I669f5df6d642679216e04708c54f620de8d9517b
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
2021-03-02 18:31:15 +05:30
qctecmdr
34ac82245f Merge "defconfig: autogvm: rename defconfig for gvm" 2021-03-02 04:47:44 -08:00
Shreyas K K
47342c7683 drivers: qcom: boot_stats: Fix compiler error
Fix compiler error due to multiple definitions
of boot_marker_enabled function.

Change-Id: Ibeb5a33e8b13ad97d9109847c412a2442979653e
Signed-off-by: Shreyas K K <shrekk@codeaurora.org>
2021-03-02 16:59:07 +05:30
Zhenhua Huang
4cf5d25bce mm: cma: Print correct request pages
In case of cma allocation failure, req-size is logged, but instead of
requested size we are printing total size. Fix it.

Fixes: 45422bc880 ("mm: cma: Print region name on failure")
Change-Id: Ifc96209a0ccdb295fbb9767d3d93b3a567fa16fd
Signed-off-by: Zhenhua Huang <zhenhuah@codeaurora.org>
2021-03-02 17:49:29 +08:00
Venkata Rao Kakani
e721d45c1d defconfig: autogvm: rename defconfig for gvm
Rename quinvmauto to autogvm to have superset configs for
all gen linux guest.

Change-Id: Ic4a87ebdf4aa3d97ee4dd8265e4dcbde630637e7
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
2021-03-02 00:20:32 -08:00
Sarthak Garg
2ccbde6a77 mmc: sdhci-msm: Affine irq to first set of mask when CONFIG_SMP enabled
For MDM targets with single CPU, CONFIG_SMP won't be enabled so
irq_set_affinity_hint will always return EINVAL leading to unnecessary
WARN_ON.

Use irq_set_affinity_hint only for multiple CPU's or when CONFIG_SMP
enabled.

Change-Id: Id37299759927953e485850fb015a3739fd3daed7
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
2021-03-02 13:28:05 +05:30
qctecmdr
d3b331a720 Merge "defconfig: sdxnightjar: Enable LKDTM driver" 2021-03-01 22:58:15 -08:00
qctecmdr
15d54897fb Merge "defconfig: sdmsteppeauto: enable PCA954x & SX150X driver" 2021-03-01 22:58:15 -08:00
qctecmdr
38f31c0a12 Merge "msm:ipa: fix the size of vlan_id" 2021-03-01 22:58:14 -08:00
qctecmdr
749644af9b Merge "usb: gadget: Add support for MBIM OS descriptor handling" 2021-03-01 22:58:14 -08:00
qctecmdr
c45d51c816 Merge "power: supply: smb1390: Add support to make SMB1390 driver GKI compliant" 2021-03-01 22:58:14 -08:00
qctecmdr
a16d8feba4 Merge "cnss2: Use separate DT entry to add firmware path prefix" 2021-03-01 22:58:14 -08:00
Santosh Dronamraju
d184e1c732 defconfig: Enable TZ-log driver
Enable TZ-log driver to access TZ Diag area.

Change-Id: I3bba8eb7eedcf37d85ea406676c155cdbca652b2
Signed-off-by: Santosh Dronamraju <sdronamr@codeaurora.org>
2021-03-01 22:25:57 -08:00
Vivek Kumar
0db53dfad2 arm64: defconfig: Add initial defconfig fragments for Direwolf
Add initial defconfig fragments for Direwolf which includes
GKI, QGKI and debug config files.

Change-Id: Icbaf8479d4bacdc2531d735b5dc762dcbffb3433
Signed-off-by: Vivek Kumar <vivekuma@codeaurora.org>
2021-03-02 11:32:38 +05:30
Anant Goel
48610e6837 arm64: Kconfig: Add config option for Direwolf
Add option "CONFIG_DIREWOLF" to enable to compilation for
the Direwolf platform.

Change-Id: Id556b35e251002d07f7ee38023725f744ee682c3
Signed-off-by: Anant Goel <anantg@codeaurora.org>
2021-03-02 11:31:31 +05:30
qctecmdr
5ac088fc31 Merge "spi: spi-geni-qcom: Use DMA mode for SPI responder requester" 2021-03-01 20:58:40 -08:00
qctecmdr
f63c8fdc2e Merge "iommu: read tcu clock testbus properly" 2021-03-01 20:58:40 -08:00
qctecmdr
894b5fef79 Merge "byte-cntr: ensure usbch to be ready" 2021-03-01 20:58:39 -08:00
qctecmdr
de22444300 Merge "spi: spi-msm-geni: Keep IRQ disabled before irq registration" 2021-03-01 20:58:39 -08:00
qctecmdr
a40413c1e7 Merge "msm: kgsl: Enable IFPC feature for A635 GPU" 2021-03-01 20:58:38 -08:00
Yue Ma
55df7912d1 cnss2: Use separate DT entry to add firmware path prefix
qcom,converged-dt is meant to use one DT node which has multiple
sub-nodes to support multiple devices. There is also one simple
scenario that one same DT node can be directly used by multiple
devices without creating sub-nodes. Use separate DT entry for such
case to add firmware path prefix to simplify implementation and
avoid conflicts.

Change-Id: I3beb3dfce30d31f086eeb6667afa83560880ff32
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2021-03-01 18:16:24 -08:00
Hemant Kumar
3f3bc98c8d usb: gadget: Add support for MBIM OS descriptor handling
In order to support MBIM in a multi-config usb composition
make use of composite gadget driver support for OS descriptor.
This allows Host to identify preferred configuration to choose.
Pass signature field, vendor code, compatibleID and
subCompatibleID from user space. Also remove redundant MBIM OS
descriptor related data structure definitions in the driver.

Change-Id: I6fd8b950d53ef700be2d435e5973dd2c74525cd8
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Signed-off-by: Elson Roy Serrao <eserrao@codeaurora.org>
2021-03-01 14:30:21 -08:00
Xiaowen Wu
6e3a3eeba1 defconfig: sdmsteppeauto: enable PCA954x & SX150X driver
Enable i2c mux chip PCA954x driver and pinctrl chip SX150X driver for
sdmsteppeauto platform.

Change-Id: I01fc2771733e1ec5e4868955b5bcf76b78f3e234
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
2021-03-01 12:03:20 -08:00
Manaf Meethalavalappu Pallikunhi
3b354ef078 drivers: thermal: pe_sensor: enable pe interrupt as wake up interrupt
The policy engine interrupt disables during apps power collapse. But
there is a chance that still other subsystem SDPM voting can be
changed and that could cause policy engine violation. It leads to
non handling of interrupt and mitigation during apps power collapse.

Enable pe interrupt as wake up interrupt.

Re-order PE interrupt clear and handling mitigation sequence in
pe interrupt handler so that there is no chance to miss interrupt
post handling of previous interrupt.

Change-Id: I2c7d3014617acc99be30d3ae727736d5695c15e1
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
2021-03-02 00:17:48 +05:30
qctecmdr
a77dc8abd6 Merge "mmc: core: Update mmc_scale_high logic properly for HS400 mode" 2021-03-01 10:10:57 -08:00
qctecmdr
6efcd53294 Merge "mmc: core: Set the correct frequency when scaling down to DDR mode" 2021-03-01 10:10:56 -08:00
qctecmdr
0ef7ecb4c0 Merge "clk: qcom: gcc-yupik: Use floor ops for SDCC clocks" 2021-03-01 10:10:55 -08:00
qctecmdr
f2428d889d Merge "mmc: sdhci-msm: Use actual clock for mclk_freq calculation" 2021-03-01 10:10:55 -08:00
qctecmdr
67000e0bbe Merge "usb: dwc3: gadget: Bail out for short packets/ZLPs only if IOC is not set" 2021-03-01 10:10:55 -08:00
qctecmdr
562954a4b6 Merge "interconnect: qcom: update prio for gpu_tc of scshrike" 2021-03-01 10:10:54 -08:00
qctecmdr
60fc349577 Merge "mmc: host: Check for reset prior to DMA address unmap" 2021-03-01 10:10:54 -08:00
Jilai Wang
0280754818 msm: npu: Add NPU driver support
This change is to port NPU driver(v1) from 4.14 to 5.4 kernel.

Change-Id: I3c9d61c638cfb3b85da6f12e679c2c27f7ac0a42
Signed-off-by: Jilai Wang <jilaiw@codeaurora.org>
2021-03-01 12:01:53 -05:00
Charan Teja Reddy
b9970b80c4 iommu: read tcu clock testbus properly
Porgramming guide for tcu clock testbus controller says:

1) Write to the ARM_SMMU_TESTBUS_SEL_HLOS1_NS.
2) Read from the ARM_SMMU_TCU_TESTBUS_HLOS1_NS

to know the internal smmu clock status. Program them accordingly.

Change-Id: I6140d877c2d8366030699fb04099078ebb3b6e2c
Fixes: 47b2cb7ab2 ("iommu: arm-smmu: update access to SMMU TCU testbus registers with scm call")
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
2021-03-01 18:37:37 +05:30
Ashish Kori
c6237d0ba1 spi: spi-geni-qcom: Use DMA mode for SPI responder requester
SPI Transfer mode selection is based on length but in SPI responder case
we get some latency for FIFO mode transfer that will cause some delay
in SPI responder transfer and we get "TX_FIFO_RD_ERR" interrupt. Moving
SPI responder to DMA mode for all transfer will not have this latency
issue and SPI requester/responder  will be in sync and we won't get any
error related to SPI requester/responder sync.

Change-Id: I6b9676aad2a4875a9ff6c4d998a45d2cd8a14cfa
Signed-off-by: Ashish Kori <akori@codeaurora.org>
2021-03-01 04:20:21 -08:00
Archana Sriram
aec578f099 msm: kgsl: Set correct values for SMMU protect register for A3xx
For programming the CP Protect register for SMMU in A3xx GPU, pass
correct values for SMMU registers base offset and the count of
registers to be protected.

Change-Id: I9fa809db79efc79bb7a59304fa2b4607ed1fc567
Signed-off-by: Archana Sriram <apsrir@codeaurora.org>
2021-03-01 16:13:58 +05:30
Baowei Liu
acf9b454ba char: virtio_eavb: Add virtio_eavb frontend driver
This driver provides unified interface for applications, and communicate
with backend. So applications run in GVM but use backend eavb stack.

Change-Id: Ief3d033e5477696fa336e7225b58867fbf6aac5e
Signed-off-by: Baowei Liu <baowei@codeaurora.org>
2021-03-01 17:46:08 +08:00
qctecmdr
d56d87abb0 Merge "msm: adsprpc: Do length check to avoid arbitrary memory access" 2021-02-28 22:04:14 -08:00