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884,104 commits

Author SHA1 Message Date
Isaac J. Manjarres
07b094aef8 ion: Add support for the display non-secure CMA heap
Add support for the non-secure CMA heap for sharing display
configuration information with display hardware.

Change-Id: Idcc1a8233872cffe890ccd74c956bc666c34cd82
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-06-12 19:10:07 -07:00
Isaac J. Manjarres
c4028fcf86 soc: qcom: mem-buf: Avoid clearing transferred memory twice
Memory that goes through mem-buf is always transferred back to
the owner when the owner invokes hyp_assign() to regain access to
the memory. This means that if the owner did not have access to
the memory throughout the time the memory was lent to another VMID,
hyp_assign() will clear the memory before returning it to the owner.

Memory that is hyp_assigned through mem-buf creates a memparcel in the
resource manager(RM), when the memory is lent to another VMID, and
destroys the memparcel when the memory is reclaimed by the owner.
However, during the reclaim step, hyp_assign() is used, which clears the
memory, but the RM is unaware of the hyp_assign() policies, so it will
only clear the memory if the VM that released the memory asked for it
to be cleared, which is what mem-buf does. This results in clearing
a memory region twice, which is sub-optimal, so remove the explicit
request to sanitize the memory when the mem-buf driver releases a
memparcel.

Change-Id: I637f2305bf34d839db4f15f152b0bfcbb7b7052e
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-06-12 19:10:06 -07:00
Isaac J. Manjarres
eb749ee5d9 soc: qcom: mem-buf: Add support for consumers to import dma-bufs
Supplier virtual machines (VMs) support exporting dma-bufs to
a consumer VM. However, consumers do not support importing dma-bufs
into their VMs, so add an IOCTL command to import a dma-buf into
a consumer VM.

The client must provide a memory parcel handle that corresponds to a
dma-buf that has been shared with the consumer VM, as well as an
access control list that is used for validating the access control
rules for the buffer. Upon success, the client is given a dma-buf
fd, which they can use to map the buffer and access it from both
the CPU, and peripherals.

Change-Id: I548e004e73543421b932430fbd9f84ad76658ef8
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-06-12 19:10:06 -07:00
Isaac J. Manjarres
50c067fc65 soc: qcom: mem-buf: Add support for suppliers to export dma-bufs
Currently, mem-buf suppliers can only provide a consumer with a memory
buffer if the consumer requests for the memory buffer, in which case
the supplier has no control over the contents of the buffer that is
given to the consumer. This is not ideal in cases where the supplier
virtual machine (VM) may have data that is of interest to the consumer,
which can be shared using a memory buffer.

Introduce a new IOCTL command which allows a client to specify a
dma-buf that they would like to share with a consumer VM, as well
as the access control rules that should be applied to the buffer.

Change-Id: I1e4ec1205ad4e69039ec0ab26b4209512896a354
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-06-12 19:10:06 -07:00
Isaac J. Manjarres
253aacc2ad ion: msm: Add support for dynamically preventing dma-buf mappings
The current rules for determining if a buffer can or cannot be mapped
to depend on how a buffer was allocated. This is restrictive
in environments where the security state of a buffer can change
dynamically, as the accessibility of the buffer has to change with
respect to the security state of the buffer.

Thus, add support to track the number of userspace mappings associated
with an ION buffer, as well as an interface to allow drivers to lock
and unlock a buffer. In this context, locking a buffer means that the
buffer will no longer be mappable, and the buffer does not
have any outstanding mappings at the time the buffer is locked.
Unlocking the buffer means that the buffer can be mapped again.

Change-Id: I6aa73b9ac7c301b12106ad3d3bcb4c2aac959e55
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-06-12 19:10:01 -07:00
Isaac J. Manjarres
5dbd5d6343 ion: Derive CMA buffer struct page without using priv_virt
The priv_virt field can be useful for storing other meta-data
associated with a buffer besides the pointer to the struct page
associated with the buffer. Additionally, the struct page
pointer can be derived by looking at the sg-list structure for
the buffer. Thus, use the sg-list structure to derive the struct
page pointer for a CMA buffer, instead of the priv_virt field.

Change-Id: I1740ac56c4268ece315144fb2c3d8f48d9608c41
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-06-08 23:49:09 -07:00
Isaac J. Manjarres
7718d1b480 soc: qcom: mem-buf: Improve modularity of certain functions
Certain functions in the mem-buf code assume that they will
operate on a particular type of structure that houses all of
the information that they need. This becomes restrictive
when attempting to use those functions without the housing
data structure. Thus, to improve the modularity of these
functions, change their signatures so that they require
only the necessary pieces of information as inputs.

Change-Id: I93c988f700fed3db5a5ccf8702cb8ac100f8f428
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-06-08 11:17:28 -07:00
Isaac J. Manjarres
8a3ebb45c7 soc: qcom: mem-buf: Add tracepoints and augment logging
Add tracepoints for the mem-buf driver to collect a sequence of
events, as well as state to ascertain how much progress the
allocation process makes.

Change-Id: Icc8884d66655e21dd704266e7bc06264858bf527
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-06-08 11:17:22 -07:00
Isaac J. Manjarres
6476e65d66 soc: qcom: mem-buf: Fix error handling when releasing memory
When releasing memory, notify the owner of the memory that it
can be reclaimed only if the recipient VM has successfully
released the memory. There is also no reason to continue
to hold onto the mem-buf descriptor memory if a failure
occurs when relinquishing the memory, so free those structures
as well, independent of the result of the relinquish operation.
While we're here, touch up some of the error logging in the
error paths as well.

Change-Id: I29bb1774507fd75f206c0537b6007182b4d6cb48
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-06-05 14:54:24 -07:00
Isaac J. Manjarres
dbe59ab3f8 soc: qcom: mem-buf: Do not free memory if hyp_assign() fails
The state of memory--with respect to access control--is unknown
when a hyp_assign() call fails because the underlying SCM call
fails. In these cases, it is not safe to access the memory, so
we should not free it back to the system.

Change-Id: I992225cdd5f26fbba60d2966d051d026326cd593
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-06-05 14:33:21 -07:00
Isaac J. Manjarres
8340c9f96e soc: qcom: mem-buf: Align allocation sizes to MHP subsection size
The allocation code hot-adds the memory from another VM through
the memory hotplug code to create the S1 CPU MMU mappings. The memory
hotplug code can only add memory at a subsection granule, meaning
that all memory requests must be subsection size aligned. Thus,
enforce all allocation requests to be subsection size aligned.

Change-Id: Ia4d3294e36265f0bd956fa42670f2ac8d6974908
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
2020-06-05 14:32:52 -07:00
qctecmdr
51baf5ad2c Merge "clk: qcom: clk-rcg2: Add support to print rcg's CMD_DFSR register" 2020-06-05 05:06:33 -07:00
qctecmdr
86bb23c4e5 Merge "dwc3: gadget: Don't block doorbell before halting USB controller" 2020-06-05 05:06:32 -07:00
qctecmdr
a455d70f08 Merge "dwc3-msm: Move override usb speed functionality outside edev check" 2020-06-05 05:06:32 -07:00
qctecmdr
65fbcfac6f Merge "usb: dwc3: gsi: Disable GSI wrapper on clearing run_stop" 2020-06-05 05:06:28 -07:00
qctecmdr
5313030298 Merge "sched: Compile cpu_isolated_mask in SCHED_WALT only" 2020-06-05 05:06:27 -07:00
qctecmdr
9c7599702e Merge "defconfig: arm64: Enable Global clock controller for HOLI" 2020-06-05 05:06:27 -07:00
qctecmdr
25a07ed45c Merge "usb: phy: Reset and initialize HSPHY in host mode when EUD is enable" 2020-06-05 05:06:26 -07:00
qctecmdr
4b99be94b6 Merge "hwmon: Add QTI AMOLED ECM driver" 2020-06-05 05:06:26 -07:00
qctecmdr
7b7d13e1a5 Merge "drivers: soc: qcom: handle system sleep activities" 2020-06-05 00:39:02 -07:00
qctecmdr
1fa725da96 Merge "clk: qcom: lahaina: Add pll test ctl regs" 2020-06-05 00:39:02 -07:00
qctecmdr
732adf0e7c Merge "clk: qcom: gcc-lahaina: Add USB force_mem_core_on clocks" 2020-06-05 00:39:01 -07:00
qctecmdr
31cb055051 Merge "arm64: configs: Disable DCC console for Lahaina" 2020-06-05 00:39:01 -07:00
qctecmdr
485cd69967 Merge "cpuidle: lpm-levels: Track and predict next rescheduling ipi" 2020-06-04 20:01:38 -07:00
qctecmdr
f071bb5252 Merge "defconfig: lahaina: Enable linux bridge" 2020-06-04 20:01:38 -07:00
qctecmdr
92daa813ad Merge "radio: RTC6226: implement file read for rtc6226 driver" 2020-06-04 20:01:38 -07:00
qctecmdr
6275165e1e Merge "qseecom: Enable APIs only when module is enabled" 2020-06-04 20:01:37 -07:00
qctecmdr
e49657f5cf Merge "radio: RTC6226: remove the V4L2_CAP_DEVICE_CAPS cap as device_caps" 2020-06-04 20:01:37 -07:00
qctecmdr
14e6052999 Merge "proc: update perms of node "reclaim"" 2020-06-04 20:01:37 -07:00
Vivek Aknurwar
0b066d6321 clk: qcom: clk-rcg2: Add support to print rcg's CMD_DFSR register
Add support to print rcg's CMD_DFSR register. DFS_EN bit 0 of CMD_DFSR
register indicates clk DFS mode.

Change-Id: I5d98550f89bdd14496f94edc455d67f61a1566a4
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2020-06-04 15:03:49 -07:00
Vivek Aknurwar
da558fdefd clk: qcom: clk-alpha-pll: Add support to print PLL SSC registers
Add support to print PLL SSC registers.

Change-Id: Id2f6c19f4a768b3f30370a1b6a573d2b41d1daa9
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
2020-06-04 15:03:37 -07:00
qctecmdr
c2ac24a1a9 Merge "mhi: core: Read transfer length from an event properly" 2020-06-04 14:48:28 -07:00
qctecmdr
0efc14c3da Merge "mhi: core: Fix out of bound channel id handling" 2020-06-04 14:48:28 -07:00
qctecmdr
5a4580bd6b Merge "abi: Update qcom whitelist for cnss and netif" 2020-06-04 14:48:27 -07:00
qctecmdr
ab1b160dd8 Merge "coresight: etm4x: Fix use-after-free of per-cpu etm drvdata" 2020-06-04 14:48:27 -07:00
Mayank Rana
3e583e6cee usb: phy: Reset and initialize HSPHY in host mode when EUD is enable
EUD HUB functionality is relevant into USB device mode only. Hence when
using USB host mode, continue performing reset and initialization
functionality with HSPHY even though EUD is enable. If EUD is enable
while starting host mode, re-enable EUD whie exiting host mode.

Change-Id: Ifc2a105d8a02511dd2fc58be5fbc788d46546ba0
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-06-04 12:21:41 -07:00
Mayank Rana
a05993824c dwc3-msm: Move override usb speed functionality outside edev check
Currently usb speed override functionality doesn't work as expected
when usb role switch based notification is used. Hence move usb speed
override functionality out side edev check within dwc3_resume_work()
API. Also update maximum_speed as max hw supported speed out side
edev check.

Change-Id: I69b066721490277b77333d2caf820b6c87703501
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2020-06-04 12:08:56 -07:00
Elliot Berman
9f125adcf2 sched: Compile cpu_isolated_mask in SCHED_WALT only
cpu_isolated_mask can only be used when SCHED_WALT is enabled. The
addition of the cpu_isolated_mask causes ABI to break. Thus, compile
references to cpu_isolated_mask only when SCHED_WALT is enabled.

Change-Id: I0982f6431abca807168dbabc4aca74771819565c
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2020-06-04 11:42:49 -07:00
Jeevan Shriram
09a7c66654 arm64: configs: Disable DCC console for Lahaina
Disable ARM JTAG DCC console for Lahaina platform.

Change-Id: Iadd3fc939401d47662ab0ed72411d7fa37b27f6b
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
2020-06-04 10:58:45 -07:00
Taniya Das
6f76b42f79 defconfig: arm64: Enable Global clock controller for HOLI
Enable clock controller for HOLI.

Change-Id: Ib3f2f73dc08a530597a52cab202602ace8da6139
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-06-04 23:15:52 +05:30
qctecmdr
766163e7f1 Merge "qbt: Add support for touch events from input framework" 2020-06-04 10:39:49 -07:00
qctecmdr
e47a4e0e2f Merge "bluetooth: Vote VREG_L7E_2P8 from BT driver" 2020-06-04 10:39:49 -07:00
qctecmdr
b6ea26a756 Merge "cnss2: Allow WLAN driver register after cold boot calibration" 2020-06-04 10:39:48 -07:00
qctecmdr
8066095330 Merge "msm: camera: Add camera dt binding definitions" 2020-06-04 10:39:48 -07:00
qctecmdr
277df4ce60 Merge "msm: ADSPRPC: Fix to avoid race condition and use after free" 2020-06-04 10:39:48 -07:00
Taniya Das
d72d303946 Revert "defconfig: holi: Add support for Global clock controller"
This reverts commit 8ae959a72f.

Change-Id: I04df95da8726f7f415844754b17c0f168d6787fb
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2020-06-04 23:09:24 +05:30
Mike Tipton
75656695f4 clk: qcom: gcc-lahaina: Add USB force_mem_core_on clocks
The FORCE_MEM_CORE_ON bits default to 0 and this is fine for most use
cases. However, USB needs FORCE_MEM_CORE_ON=1 to properly retain its
memories when USB APM switches from CX to MX. This can't just be a
one-time setting since the FORCE_MEM_CORE_ON bits need to be set/cleared
upon USB cable connect/disconnect for power optimization. Add fake
clocks to allow the USB client to control them.

Change-Id: Ic7aac944feaa6a956a8892e0cf1f4dd465659302
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2020-06-04 10:18:41 -07:00
Mike Tipton
8d1bdc46b2 dt-bindings: clock: Add USB FORCE_MEM_CORE_ON bindings
Add clock bindings to control the USB FORCE_MEM_CORE_ON bits.

Change-Id: I406e98e1be5b4d6702636c3bfdf738ae9ff12198
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2020-06-04 10:16:46 -07:00
qctecmdr
732a1ae2a0 Merge "soc: qcom: dcc: avoid memory access violation" 2020-06-04 06:22:35 -07:00
qctecmdr
5f981341c1 Merge "msm: adsprpc: Fix error code for invalid ioctl" 2020-06-04 06:22:34 -07:00