Depending on timing there is a chance the channel initialization will
happen at different intervals. When this happens, the first channel
wakeup will be cleared by the init loop and never be set again by the
channel init. This leads to a stall in init because both channels
will never have both their wakeups set to signal channel init done.
Change-Id: I435e78c3e4b83cf6b827d3827f35d1e6a1b297fa
Acked-by: Chris Henroid <chenroid@qti.qualcomm.com>
Signed-off-by: Chris Lew <clew@codeaurora.org>
This change allows kernel modules to make calls to register external
display interfaces and deregister them.
Change-Id: Ia7236bd458565bbbdec4a8355c40a1c5a1bcab86
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
mhi_reg_write_enqueue API stores reg, val and valid which can go
out of order. In case valid is set to true before val is set,
offload worker running on another core ends up writing stale value
to register. Another possibility is valid being set to true but not
visible to other cores. When offload worker gets a chance to run,
this results into skipping register write. Fix these issues by
adding smp_wmb() between stores of val and valid and another after
valid is set.
Change-Id: I3b930e7fad4252d34386de525491f94997b34f36
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Add new GPU chip id and required code to
Support A619 GPU.
Change-Id: I9b4e8b35e536486c63661b050a2242538d873c2d
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
CVP SSR crashed when derefencing the pointer to a
shared memory buffer descriptor.
Change-Id: I3f7b690d90496efdf0451b5500578fee636f81fe
Signed-off-by: George Shen <sqiao@codeaurora.org>
Currently, the async job member of the ioctl structure is not
being initialized properly while making an unmap call to the
remote subsystem because of which an indeterminate value is used
to incorrectly mark this RPC call as an asynchronous job.
Initialize the async job field to NULL before making the RPC call
to unmap memory on DSP.
Change-Id: I611e9419793da32f73b9997c7dbe50e3d1e7e81b
Acked-by: Thyagarajan Venkatanarayanan <venkatan@qti.qualcomm.com>
Signed-off-by: Himateja Reddy <hmreddy@codeaurora.org>
Adding numerator and denominator to sensor data
for increasing scalability of driver.
Change-Id: Iba90d890b70feae41a273fd51d1a76ab61c5211b
Signed-off-by: Rohit Bandi <rohitbandi@codeaurora.org>
Add support for CDSP DCVS and CDSP hardware cooling devices to QMI
cooling device driver. These cooling devices can be used to mitigate
CDSP subsystem at high temperature via qmi interface.
Change-Id: Ia9906b07ebca4bd6158b68e6e100405ebaa30b60
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
Do not hard code resource address in PDC initialization
sequence to avoid incorrect configuration. Instead get
resource address from cmd-db driver.
Change-Id: If2cc8378c1c00304033d726fdb8bd4e8690ef110
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Add clock IDs for GCC/DISPCC/GPUCC for clients to be able to
request for clocks from these clock controllers.
Change-Id: I601af44801668ae76d5cd181051ae9ba7b0c6dc0
Signed-off-by: Saurabh Sahu <sausah@codeaurora.org>
This change is a performance optimization. Instead of sending a DRI
deassert command at the end of a Data Ready DRI, the FW shall get a FIFO
empty internal signal. FW sets the don't deassert bit in relevant cases,
like Data Ready DRI, or SYSASSERT DRI.
Change-Id: I810e891a82b80c256857987b446c2162bacc399e
Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
Signed-off-by: Alexei Avshalom Lazar <ailizaro@codeaurora.org>
