Commit graph

3,098 commits

Author SHA1 Message Date
qctecmdr
54187e9228 Merge "ARM: dts: msm: Add RDPM register map for Lahaina GPU" 2020-11-12 09:55:01 -08:00
qctecmdr
fddd9a3508 Merge "ARM: dts: msm: Enable qcom,power-always-on for GPU SMMUs on GKI targets" 2020-11-11 23:52:30 -08:00
qctecmdr
36d0168660 Merge "ARM: dts: msm: Add DCC register list for holi" 2020-11-11 23:52:30 -08:00
qctecmdr
2648c3ecec Merge "ARM: dts: qcom: Add entries for power off/downlaod mode driver" 2020-11-11 23:52:30 -08:00
qctecmdr
edadcfeb28 Merge "ARM: dts: msm: Add v2 MTP VM device tree file for lahaina VM" 2020-11-11 23:52:30 -08:00
qctecmdr
41606fa52e Merge "ARM: dts: qcom: Added msm-id entry for single-die sdxlemur" 2020-11-11 23:52:30 -08:00
qctecmdr
7aeac31437 Merge "ARM: dts: msm: Update the rpm-smd node with correct IRQ for holi" 2020-11-11 23:35:23 -08:00
qctecmdr
a4cba904a3 Merge "ARM: dts: msm: Add missing changes to shima-atp dtsi" 2020-11-11 23:35:23 -08:00
qctecmdr
daa3a68c6b Merge "ARM: dts: msm: Increase MHI event rings number for SDXLEMUR" 2020-11-11 23:35:23 -08:00
qctecmdr
a6a40ec05d Merge "bindings: qcom-hv-haptics: add properties to support non-HBoost regulator" 2020-11-11 23:35:23 -08:00
qctecmdr
fca6265a93 Merge "ARM: dts: msm: Update regulator S3A for holi" 2020-11-09 23:34:42 -08:00
qctecmdr
735033efcf Merge "ARM: dts: msm: Add DDR cooling device for Lahaina" 2020-11-09 23:34:42 -08:00
qctecmdr
b833742c2b Merge "ARM: dts: msm: Add secure display heap configuration for Yupik" 2020-11-09 09:59:51 -08:00
qctecmdr
14cc957ba4 Merge "ARM: dts: msm: Add vdd parent supply for holi GPU" 2020-11-09 09:59:51 -08:00
qctecmdr
b34b01c143 Merge "Revert "ARM: dts: msm: enable mem_offline.bypass_send_msg for holi"" 2020-11-09 04:48:53 -08:00
Murali Nalajala
faf772ccd4 ARM: dts: msm: Add v2 MTP VM device tree file for lahaina VM
Add support for MTP v2 for lahaina SVM.

Change-Id: I7ccfd86b8f15e9233bc76ed9286b12f3239d20a6
2020-11-08 20:46:06 -08:00
Isaac J. Manjarres
573cab957b ARM: dts: msm: Enable qcom,power-always-on for GPU SMMUs on GKI targets
The IOMMU page table management code is not optimal from a performance
perspective in the GKI configuration, relative to the downstream
implementation. When the GPU enters slumber, and requests the SMMU
driver to unmap memory from the stage 1 page tables of the GPU.

When unmapping memory, the SMMU driver must access the GPU SMMU's register
space, so it must vote for power resources to access the TLB invalidation
registers. When the GPU is in slumber, there aren't votes for the GPU
SMMU's power resources, so the SMMU driver constantly ends up
enabling/disabling the power resources, which takes a considerable
amount of time. When paired with the suboptimal IOMMU page table management
code, this leads to performance issues where the time taken to unmap
memory is large.

Thus, for all targets that support GKI, add the qcom,power-always-on
property for the GPU SMMUs of these targets, to remove the latency
incurred by having to enable/disable power resources in the GKI
configuration.

Change-Id: Id3237214e44c008871d01ec6652b08c4fb24e41c
2020-11-05 15:17:13 -08:00
Isaac J. Manjarres
478799800f dt-bindings: Document the qcom,power-always-on property for SMMU devices
Document the qcom,power-always-on property for SMMU devices. This
property specifies that the votes for power resources for an SMMU
should always be maintained.

Change-Id: I854e07b65d93ed78f9d3e270149d28ef6b599039
2020-11-05 15:17:13 -08:00
Melody Olvera
68019dd2fc ARM: dts: qcom: Add entries for power off/downlaod mode driver
Revised entries to enable power off/download mode driver.

Change-Id: I32f27f9125b73ecf5ee1bd345e5cbfe2aa0742ba
2020-11-05 11:31:29 -08:00
qctecmdr
9da229fee4 Merge "ARM: dts: msm: Add bindings for PCIe end point driver" 2020-11-05 01:57:23 -08:00
Raghavendra Kakarla
de3737da8d ARM: dts: msm: Update the rpm-smd node with correct IRQ for holi
Update the rpm-smd node with proper glink-rpm irq so that
rpm driver can mask the glink-rpm interrupt while going to
APSS deep sleep.

Change-Id: I1823ce98a2c1cd0586a2f68d1610edae5bb2f0d7
2020-11-05 13:28:59 +05:30
Rajeshwar Kurapaty
7d6bd23993 ARM: dts: msm: Add secure display heap configuration for Yupik
Add secure display heap configuration to enable secure memory
allocations for secure display/camera usecases.

Change-Id: I27132f3b1d85458fc9dc77d4969a42c5aa29ad09
2020-11-05 12:04:38 +05:30
Ankur Bansal
c18494f849 ARM: dts: msm: Add DCC register list for holi
Add DCC register list to support DCC register dump
for Holi SOC.

Change-Id: Ib97094105c612dacdacc6eac0bfa4dd511d3ccc7
2020-11-04 19:41:37 -08:00
Ram Chandrasekar
054bc305fd ARM: dts: msm: Add DDR cooling device for Lahaina
Add DDR cooling device for Lahaina to vote for DDR bandwidth when the
DDR temp reaches 90C.

Change-Id: I83106de17b587e5b59f0a8b7cd1fe1dad5af15b2
2020-11-04 15:40:18 -08:00
qctecmdr
00f1532751 Merge "ARM: dts: msm: Add QUPv3_0 and SE5 dt nodes for YUPIK" 2020-11-04 14:57:11 -08:00
qctecmdr
8086b52e0a Merge "ARM: dts: msm: Add change for smmu memory optimizations" 2020-11-04 14:57:11 -08:00
qctecmdr
535450b100 Merge "ARM: dts: msm: Add configuration for vref regulator vote for SHIMA" 2020-11-04 14:57:11 -08:00
qctecmdr
f465441f28 Merge "ARM: dts: msm: adjust pm6150a_l1 initial voltage for Holi platforms" 2020-11-04 14:57:11 -08:00
qctecmdr
f14727b9ec Merge "ARM: dts: msm: Enable touch for Dual DSI panel on shima" 2020-11-04 06:07:45 -08:00
qctecmdr
031a86ed47 Merge "ARM: dts: msm: Disable dma-coherent for IPA CBs on SDXLEMUR" 2020-11-04 06:07:45 -08:00
Fenglin Wu
68591d5778 ARM: dts: msm: adjust pm6150a_l1 initial voltage for Holi platforms
Set pm6150a_l1 initial voltage to 1.8V by default and set it to
1.86V specific for Holi QRD platform to meet the display panel power
requirement.

Change-Id: I19beed5a3025a3e96653a4762ab8c2d73b7a0068
2020-11-04 12:51:46 +08:00
Ram Chandrasekar
af3f5c76a2 dt-bindings: Add DDR cooling device
Add DDR cooling device to vote for DDR frequency.

Change-Id: Id719cb06ec6dafdff21281391e5fa3d475c83910
2020-11-03 15:10:08 -08:00
Ritesh Kumar
2432f0dd54 ARM: dts: msm: Enable touch for Dual DSI panel on shima
Enable touch for Dual DSI panel on shima.

Change-Id: Icb198d7831b1932b199c0e680af0f32c72f0913f
2020-11-03 18:53:06 +05:30
Harigovindan P
91c737ada2 ARM: dts: msm: Add cphy video/cmd mode touch support on shima
Add cphy video/cmd mode touch support on shima target.

Change-Id: I7a089bc246b428c79adb3e09cf94c357e8447a65
2020-11-03 18:52:37 +05:30
Gopala Krishna Nuthaki
5e679a8be0 ARM: dts: msm: Add configuration for vref regulator vote for SHIMA
Add regulator configuration for vref regulators so that LMH driver
can place a active only vote for shima.

Change-Id: I67ffdf7cac820ddcc81b901d4652c4f44aa8fdaf
2020-11-03 17:50:55 +05:30
Gopala Krishna Nuthaki
75d2c9ac76 ARM: dts: msm: Add CX and MX SDPM configuration for SHIMA
Add CX SDPM configuration to monitor Camera, UFS clocks
for SHIMA.

Add MX SDPM configuration to monitor Camera, Video, and other misc clocks
for SHIMA.

Change-Id: I2d38c7d48cf4b05198f924dccb7b2858d679e6a6
2020-11-03 15:18:16 +05:30
Prakash Gupta
973e31a213 Revert "ARM: dts: msm: enable mem_offline.bypass_send_msg for holi"
This reverts commit a0fb9e8113.

Change-Id: Ie81129defd4fa5b91fb0043fe9f2644dde5f8173
2020-11-03 12:07:10 +05:30
qctecmdr
5e1fd5d8e9 Merge "ARM: dts: msm: Keep default PM level setting for Lahaina" 2020-11-02 20:59:36 -08:00
qctecmdr
f971c7fe46 Merge "ARM: dts: msm: Add acd registers for HOLI" 2020-11-02 20:59:36 -08:00
Bojun Pan
2c849413fa ARM: dts: msm: Disable dma-coherent for IPA CBs on SDXLEMUR
DMA coherent is not required for MDM target.

Change-Id: I9c115bbab9bdecc5573dbc2a264faff7da5f9e77
2020-11-02 18:55:59 -08:00
Melody Olvera
71f7319768 ARM: dts: qcom: Added msm-id entry for single-die sdxlemur
Added an entry for sdxlemur single-die to allow for dt detection
to work properly.

Change-Id: I6bae742d0530e71967cf01f1629106b6e5dc76fe
2020-11-02 18:41:24 -08:00
qctecmdr
99a752f14c Merge "ARM: dts: msm: Configure USB SMMU in atomic mode on sdxlemur" 2020-11-02 17:15:17 -08:00
Asutosh Das
323a118d1d ARM: dts: msm: Keep default PM level setting for Lahaina
The default settings are rpm-level = spm-level = 3.
This translates to UFS_SLEEP_PWR_MODE & UIC_LINK_HIBERN8_STATE.

Change-Id: I9c08875d193fbefe0846f53e8b95dd6e840485de
2020-11-02 15:40:33 -08:00
Mukesh Ojha
7c14214d5c ARM: dts: msm: Add missing changes to shima-atp dtsi
Add ATP target specific changes to take care booting on
Shima ATP platform.

Change-Id: I13a0e8492510dc963bf34d9d997ae91865f40a42
2020-11-02 22:24:34 +05:30
qctecmdr
acff87060e Merge "ARM: dts: msm: Add bootargs for Yupik" 2020-11-02 07:48:25 -08:00
Taniya Das
55d3df1c60 ARM: dts: msm: Add acd registers for HOLI
The GPU GX GDSC requires the ACD block/misc resets during GDSC
power-up/down sequence, thus add the register offsets.

Change-Id: Ica77fa0a270186ecdbafb4e8d0888ef0b81613bf
2020-11-02 15:58:47 +05:30
qctecmdr
fc59006851 Merge "ARM: dts: msm: Update PCIe LDO clock from CXO to CXO_A" 2020-11-02 02:18:43 -08:00
qctecmdr
2658de293c Merge "ARM: dts: qcom: Enable TSENS driver support for sdxlemur" 2020-11-02 02:18:43 -08:00
qctecmdr
de6c739e52 Merge "ARM: dts: msm: disable GPU funnel" 2020-11-02 02:18:43 -08:00
qctecmdr
8a9de86250 Merge "Revert "ARM: dts: msm: Add new DT entry for wan agg pkt size"" 2020-11-02 02:18:43 -08:00