Add virtual spmi pmic and its dependent device tree node
to support SA8155 for automotive platforms.
Change-Id: I4c4411a4d0cd2331ae62e46aed1ec9e054be4d88
Enable TSENS driver, default userspace thermal zone rules for each
TSENS, enable QMI cooling device, regulator cooling device and
enable modem junction temperature mitigation thermal zone rule for
sdxnightjar.
Change-Id: I67efdb252e3fb59a6d6256b03613b14e8a5e2c56
Accumulative cycle counters are not supported, cycle counter needs
to be read from the core-0 of the frequency domain.
Add property to indicate the same.
Change-Id: I503c4470824d29ee95a3c39a172ec716be77c61b
Enlarge the minidump cma area due to a number of new DTSI nodes
(mainly related to CPU cache minidumps) have been added, which
require more space.
Change-Id: I8826f367433c6a26c5f1538166c4edc592996eb3
Add snapshot of pmi632 ,pm6125 and pm6125-rpm-regulators
with base nodes for charger, QG, GPIOs, DIV_CLK, flash and
other PMIC peripherals for pmi632 and pm6125.
This snapshot is taken as of msm-4.19 commit c0c998ac0596
("Merge "ARM: dts: msm: Enable diag channels for SDM429/439/QM215"").
Change-Id: I67eea44d89f6e30824d71cd361fd4ffe90cbdec6
When unmapping memory, the SMMU driver must access the GPU SMMU's
register space, so it must vote for power resources to access the TLB
invalidation registers. When the GPU is in slumber, there aren't votes
for the GPU SMMU's power resources, so the SMMU driver constantly ends
up enabling/disabling the power resources, which takes a considerable
amount of time. When paired with the suboptimal IOMMU page table
management code, this leads to performance issues where the time taken
to unmap memory is large.
Thus, for all targets that support GKI, add the qcom,power-always-on
property for the GPU SMMUs of these targets, to remove the latency
incurred by having to enable/disable power resources in the GKI
configuration.
Change-Id: I403c9864705c50f7ce8b1118c3c75902708e647b
If there is a switch connected to PCIe root complex, the
devicetree hierarchy needs to correctly reflect the physical
connection. Add pci DT nodes for each switch device such as
switch upstream and downstream ports for sdxlemur CPE.
Change-Id: I04ddd33adc67f0ec689d014cd00ed5fa26d02a89
Additional BDF to SID mappings are needed if a switch and
mutliple endpoints are connected to PCIe root complex. Expand
iommu-map for PCIe on sdxprarie CPE to support such a usecase.
Change-Id: Id7643ab574b1472649bb70121da70a40f31c806c
Modify irq type for qcedev and qcrypto for sdxnightjar to avoid excessive
warning log for sdxnightjar.
Change-Id: Idef2bbd8024779a8c9eb60effd675b1050275136
Make sdhc aliases start from 0 to ennumerate
block devices starting from mmcblk0 for emmc and mmcblk1
for sdcard.
Change-Id: I911182f06b0d4540291501ab6352cfc01fc812c9
Replace deprecated PCIe DT entry for PCIe AUX clock controller
setting with the correct entry and value. PCIe core controller
requires AUX clock to be 19.2MHz.
Change-Id: Ia670d8e75f75939c2798d795e21771402d83569c
