Commit graph

894,328 commits

Author SHA1 Message Date
qctecmdr
bed5cfbbfb Merge "mm: cma: Print correct request pages" 2021-03-02 08:39:43 -08:00
qctecmdr
34ac82245f Merge "defconfig: autogvm: rename defconfig for gvm" 2021-03-02 04:47:44 -08:00
Zhenhua Huang
4cf5d25bce mm: cma: Print correct request pages
In case of cma allocation failure, req-size is logged, but instead of
requested size we are printing total size. Fix it.

Fixes: 45422bc880 ("mm: cma: Print region name on failure")
Change-Id: Ifc96209a0ccdb295fbb9767d3d93b3a567fa16fd
Signed-off-by: Zhenhua Huang <zhenhuah@codeaurora.org>
2021-03-02 17:49:29 +08:00
Venkata Rao Kakani
e721d45c1d defconfig: autogvm: rename defconfig for gvm
Rename quinvmauto to autogvm to have superset configs for
all gen linux guest.

Change-Id: Ic4a87ebdf4aa3d97ee4dd8265e4dcbde630637e7
Signed-off-by: Venkata Rao Kakani <vkakani@codeaurora.org>
2021-03-02 00:20:32 -08:00
qctecmdr
d3b331a720 Merge "defconfig: sdxnightjar: Enable LKDTM driver" 2021-03-01 22:58:15 -08:00
qctecmdr
15d54897fb Merge "defconfig: sdmsteppeauto: enable PCA954x & SX150X driver" 2021-03-01 22:58:15 -08:00
qctecmdr
38f31c0a12 Merge "msm:ipa: fix the size of vlan_id" 2021-03-01 22:58:14 -08:00
qctecmdr
749644af9b Merge "usb: gadget: Add support for MBIM OS descriptor handling" 2021-03-01 22:58:14 -08:00
qctecmdr
c45d51c816 Merge "power: supply: smb1390: Add support to make SMB1390 driver GKI compliant" 2021-03-01 22:58:14 -08:00
qctecmdr
a16d8feba4 Merge "cnss2: Use separate DT entry to add firmware path prefix" 2021-03-01 22:58:14 -08:00
qctecmdr
5ac088fc31 Merge "spi: spi-geni-qcom: Use DMA mode for SPI responder requester" 2021-03-01 20:58:40 -08:00
qctecmdr
f63c8fdc2e Merge "iommu: read tcu clock testbus properly" 2021-03-01 20:58:40 -08:00
qctecmdr
894b5fef79 Merge "byte-cntr: ensure usbch to be ready" 2021-03-01 20:58:39 -08:00
qctecmdr
de22444300 Merge "spi: spi-msm-geni: Keep IRQ disabled before irq registration" 2021-03-01 20:58:39 -08:00
qctecmdr
a40413c1e7 Merge "msm: kgsl: Enable IFPC feature for A635 GPU" 2021-03-01 20:58:38 -08:00
Yue Ma
55df7912d1 cnss2: Use separate DT entry to add firmware path prefix
qcom,converged-dt is meant to use one DT node which has multiple
sub-nodes to support multiple devices. There is also one simple
scenario that one same DT node can be directly used by multiple
devices without creating sub-nodes. Use separate DT entry for such
case to add firmware path prefix to simplify implementation and
avoid conflicts.

Change-Id: I3beb3dfce30d31f086eeb6667afa83560880ff32
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2021-03-01 18:16:24 -08:00
Hemant Kumar
3f3bc98c8d usb: gadget: Add support for MBIM OS descriptor handling
In order to support MBIM in a multi-config usb composition
make use of composite gadget driver support for OS descriptor.
This allows Host to identify preferred configuration to choose.
Pass signature field, vendor code, compatibleID and
subCompatibleID from user space. Also remove redundant MBIM OS
descriptor related data structure definitions in the driver.

Change-Id: I6fd8b950d53ef700be2d435e5973dd2c74525cd8
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Signed-off-by: Elson Roy Serrao <eserrao@codeaurora.org>
2021-03-01 14:30:21 -08:00
Xiaowen Wu
6e3a3eeba1 defconfig: sdmsteppeauto: enable PCA954x & SX150X driver
Enable i2c mux chip PCA954x driver and pinctrl chip SX150X driver for
sdmsteppeauto platform.

Change-Id: I01fc2771733e1ec5e4868955b5bcf76b78f3e234
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
2021-03-01 12:03:20 -08:00
qctecmdr
a77dc8abd6 Merge "mmc: core: Update mmc_scale_high logic properly for HS400 mode" 2021-03-01 10:10:57 -08:00
qctecmdr
6efcd53294 Merge "mmc: core: Set the correct frequency when scaling down to DDR mode" 2021-03-01 10:10:56 -08:00
qctecmdr
0ef7ecb4c0 Merge "clk: qcom: gcc-yupik: Use floor ops for SDCC clocks" 2021-03-01 10:10:55 -08:00
qctecmdr
f2428d889d Merge "mmc: sdhci-msm: Use actual clock for mclk_freq calculation" 2021-03-01 10:10:55 -08:00
qctecmdr
67000e0bbe Merge "usb: dwc3: gadget: Bail out for short packets/ZLPs only if IOC is not set" 2021-03-01 10:10:55 -08:00
qctecmdr
562954a4b6 Merge "interconnect: qcom: update prio for gpu_tc of scshrike" 2021-03-01 10:10:54 -08:00
qctecmdr
60fc349577 Merge "mmc: host: Check for reset prior to DMA address unmap" 2021-03-01 10:10:54 -08:00
Charan Teja Reddy
b9970b80c4 iommu: read tcu clock testbus properly
Porgramming guide for tcu clock testbus controller says:

1) Write to the ARM_SMMU_TESTBUS_SEL_HLOS1_NS.
2) Read from the ARM_SMMU_TCU_TESTBUS_HLOS1_NS

to know the internal smmu clock status. Program them accordingly.

Change-Id: I6140d877c2d8366030699fb04099078ebb3b6e2c
Fixes: 47b2cb7ab2 ("iommu: arm-smmu: update access to SMMU TCU testbus registers with scm call")
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
2021-03-01 18:37:37 +05:30
Ashish Kori
c6237d0ba1 spi: spi-geni-qcom: Use DMA mode for SPI responder requester
SPI Transfer mode selection is based on length but in SPI responder case
we get some latency for FIFO mode transfer that will cause some delay
in SPI responder transfer and we get "TX_FIFO_RD_ERR" interrupt. Moving
SPI responder to DMA mode for all transfer will not have this latency
issue and SPI requester/responder  will be in sync and we won't get any
error related to SPI requester/responder sync.

Change-Id: I6b9676aad2a4875a9ff6c4d998a45d2cd8a14cfa
Signed-off-by: Ashish Kori <akori@codeaurora.org>
2021-03-01 04:20:21 -08:00
qctecmdr
d56d87abb0 Merge "msm: adsprpc: Do length check to avoid arbitrary memory access" 2021-02-28 22:04:14 -08:00
qctecmdr
1648c740e3 Merge "msm: adsprpc: Fix double fetch from fastrpc HLOS driver" 2021-02-28 22:04:14 -08:00
qctecmdr
131e38d699 Merge "drivers: llcc: Disable MMUHWT retention" 2021-02-28 22:04:14 -08:00
qctecmdr
71b383810a Merge "defconfig: Enable linux bridge on gen3auto config" 2021-02-28 22:04:13 -08:00
qctecmdr
3a7028cbf4 Merge "arm64: defconfig: Add mproc related defconfig for sa6155" 2021-02-28 22:04:13 -08:00
qctecmdr
600ea62bc0 Merge "defconfig: Disable CONFIG_CNSS2_DEBUG for perf build" 2021-02-28 22:04:13 -08:00
qctecmdr
30ca003d16 Merge "leds: qcom-clk: Add support to set default trigger for LED" 2021-02-28 22:04:12 -08:00
qctecmdr
0ad563f877 Merge "Bluetooth: Free the XO clk GPIO after use" 2021-02-28 22:04:12 -08:00
qctecmdr
d4490ffc9b Merge "defconfig: enable rimps plh interface" 2021-02-28 22:04:12 -08:00
qctecmdr
1f84d24c6a Merge "drivers: soc: qcom: Add slatecom driver" 2021-02-28 22:04:11 -08:00
Yuanfang Zhang
e98d3f8c74 byte-cntr: ensure usbch to be ready
Ensure usbch is ready before usb bypass start to avoid usbch is NULL
in usb_read_work_fn().

Change-Id: I0b932f1713a2d49424860728e79e3684122b4e40
Signed-off-by: Yuanfang Zhang <zhangyuanfang@codeaurora.org>
2021-03-01 13:51:26 +08:00
Likai Ding
2ee8d1edcd defconfig: sdxnightjar: Enable LKDTM driver
Enable LKDTM driver to enable testing PAN features

Change-Id: I37421dd50cc4241ae73db9d4b3b953997b2934c5
Signed-off-by: Likai Ding <likaid@codeaurora.org>
2021-03-01 13:01:46 +08:00
wadesong
9ce85c9c9b defconfig: Enable linux bridge on gen3auto config
Enable linux bridge on QGKI builds to support multi-AP bridge mode.

Change-Id: I1c8278b3ca29d973ea5350028c8f065370e91271
Signed-off-by: wadesong <wadesong@codeaurora.org>
2021-03-01 09:56:56 +08:00
Arun Prakash
4b91711f77 arm64: defconfig: Add mproc related defconfig for sa6155
Add mproc related defconfig for sa8155 which inlcudes
qrtr,hwspinlock,mailbox,glink,smem,smp2p,ipc irq bridge
and ipc logging related configurations.

Change-Id: I64e8feea35a0acabf48e538dfe9e7bdd3b547b11
Signed-off-by: Arun Prakash <app@codeaurora.org>
2021-02-28 23:42:11 +05:30
Ajay Agarwal
12658022a9 usb: dwc3: gadget: Bail out for short packets/ZLPs only if IOC is not set
Currently the driver explicitly clears the HWO bit of the TRB
prepared for short packet or ZLP for EPs in both the directions,
and returns with non-zero code which breaks cleanup of completed
requests. The driver does this because it is written with the
understanding that the HW does not clear HWO for such packets.
But the databook section 4.2.3.2 says that the HW does not clear
HWO for such packets on the OUT EP only.

Now consider a device-to-host(USB IN) usecase like SW NCM, where
the u_ether driver looks for interrupt on every 5th request(say).
In between these 5 requests, if there is any packet of multiple
of MPS, then ZLP TRB will also be prepared. When the event is
received for the 5th request, we will only handle upto the ZLP
TRB because of the faulty logic described above. And only on the
event for the 10th request, we handle the 5th request (because of
IOC set on the 5th request). So, clearly the TRB cleanup logic is
lagging behind the HW actually completing the requests. When this
mismatch happens multiple times, there eventually comes a time
when the SW does not have any free requests anymore and hence
stall will be seen.

Fix this by returning with non-zero code only if the IOC bit is
set for the short packet or ZLP TRB, so that the cleanup routine
continues upto the TRB for which the event was raised.

Change-Id: I984e6de383993fc3c2da6b74147d6f50e081de34
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
2021-02-28 06:18:59 -08:00
Veera Vegivada
aa9cd16cb5 leds: qcom-clk: Add support to set default trigger for LED
Add property to configure the default trigger for the LED.
This will allow clients to use trigger APIs to configure
the brightness of the LED if needed.

Change-Id: I1db0a5f2d697c6ac6f6ae1296e43ae55509f2298
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
2021-02-27 13:36:34 +05:30
qctecmdr
607818c6ab Merge "drivers: MAX31760: disable VDD of MAX31760 and fan in RBC" 2021-02-26 11:11:01 -08:00
qctecmdr
ebc88295bf Merge "drivers: soc: qcom: rimps_memlat: add configs to get PMU/AMU count" 2021-02-26 11:11:00 -08:00
qctecmdr
42fa1dcf73 Merge "scsi: ufs: remove voting for hw ice clk" 2021-02-26 11:11:00 -08:00
qctecmdr
2e0d151b3f Merge "soc: qcom: Add support to read apps stats from smem" 2021-02-26 11:10:59 -08:00
qctecmdr
557f5fe6f2 Merge "defconfig: arm: qcom: Enable thermal drivers for sdxnightjar" 2021-02-26 11:10:59 -08:00
qctecmdr
5751df3b77 Merge "defconfig: quinvm: Enable HGSL" 2021-02-26 11:10:59 -08:00
qctecmdr
ce5a393067 Merge "defconfig: gen3auto: Enable led-qcom-clk driver" 2021-02-26 06:40:50 -08:00