Commit graph

894,770 commits

Author SHA1 Message Date
qctecmdr
4e99832122 Merge "qcom: step-chg-jeita: Add support for jeita fcc scaling" 2021-02-03 12:02:59 -08:00
qctecmdr
1faf1e1bfc Merge "msm: kgsl: Remove debugfs directory inside lock" 2021-02-03 12:02:59 -08:00
qctecmdr
38c98d8133 Merge "defconfig: arm64: Enable MAX31760 Fan Controller for Lahaina HHG" 2021-02-03 12:02:58 -08:00
qctecmdr
53aeef0d99 Merge "msm_rmnet.h: Add new ioctl to add any number of parameters of any size" 2021-02-03 12:02:58 -08:00
Mohammed Siddiq
6367afc906 Revert "cnss2: Dump mhi debug regs on receiving mhi WAKE event cb"
This reverts commit I03f8c85d8ca4f9bd1d438c1aa5bb149e86839b29.

Change-Id: I4e2cbf24ba935744db1c1dff78ebdccfedae352e
Signed-off-by: Mohammed Siddiq <msiddiq@codeaurora.org>
2021-02-03 23:20:58 +05:30
Subbaraman Narayanamurthy
e15bf7f4bf leds: leds-qti-tri-led: Don't print error log for -EPROBE_DEFER
Currently, an error log is printed every time when parsing a DT
property fails because of probe deferral. Fix it.

Change-Id: I5d7781baa1fdfaf1abaccb3b0bfbee3f14eeea24
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2021-02-03 09:23:27 -08:00
Subbaraman Narayanamurthy
4940a483a6 pwm: pwm-qti-lpg: Don't print error log for -EPROBE_DEFER
Currently, an error log is printed every time when parsing a DT
property fails because of probe deferral. Fix it.

Change-Id: Ic63c18393494b38bfb09a7ca85fd738dd2de56fd
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2021-02-03 09:23:07 -08:00
qctecmdr
c4f0b4f1f6 Merge "kernel: changes to enable tcpdump in sfe" 2021-02-03 07:49:39 -08:00
qctecmdr
2b839629df Merge "defconfig: Add PIL config to defconfig fragment" 2021-02-03 07:49:39 -08:00
qctecmdr
9ce344985c Merge "defconfig: Add SPMI config for sdxnightjar perf build" 2021-02-03 07:49:39 -08:00
qctecmdr
10564f5015 Merge "defconfig: enable memory dump on sdxlemur" 2021-02-03 07:49:38 -08:00
qctecmdr
46942c3812 Merge "Bluetooth: Add conditional check before requesting gpio" 2021-02-03 07:49:38 -08:00
qctecmdr
f4dfd154e3 Merge "drivers: soc: rename block device nodes" 2021-02-03 07:49:38 -08:00
qctecmdr
75f7b23e75 Merge "iommu: arm-smmu: optimize arch write sync delay" 2021-02-03 07:49:38 -08:00
qctecmdr
092a8d06db Merge "defconfig: Enable cnss for sdxnightjar" 2021-02-03 07:49:37 -08:00
qctecmdr
1d2c6f3cc9 Merge "usb: gsi: Initialize 'info' with zero" 2021-02-03 07:49:37 -08:00
Jishnu Prakash
8033cb6de5 regulator: qpnp-lcdb: remove workaround for LCDB regulation issue
Remove workaround added earlier for PM7325B LCDB regulation issue
as per HW recommendation.

Change-Id: I4d0e5087df3ca2ae217b74ea3bdc29035da7b97d
Signed-off-by: Jishnu Prakash <jprakash@codeaurora.org>
2021-02-03 14:16:52 +05:30
Xiaowen Wu
574218a5d4 pinctrl: add restore function for sx150x
Add restore function for sx150x to re-init hw after hibernation.

Change-Id: I657ccca872a04ebc458273fbe0ea69c7969c4dbb
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
2021-02-02 23:15:01 -08:00
Deepak Kumar Singh
17a9db976d net: qrtr: fix tx flow memory leak
The flow is allocated in qrtr_tx_wait, but not freed when qrtr node
is released. (*slot) becomes NULL after radix_tree_iter_delete is
called in __qrtr_node_release. The fix is to save (*slot) to a
vairable and then free it.

This memory leak is catched when kmemleak is enabled in kernel,
the report looks like below:

unreferenced object 0xffffa0de69e08420 (size 32):
  comm "kworker/u16:3", pid 176, jiffies 4294918275 (age 82858.876s)
  hex dump (first 32 bytes):
    00 00 00 00 00 00 00 00 28 84 e0 69 de a0 ff ff  ........(..i....
    28 84 e0 69 de a0 ff ff 03 00 00 00 00 00 00 00  (..i............
  backtrace:
    [<00000000e252af0a>] qrtr_node_enqueue+0x38e/0x400 [qrtr]
    [<000000009cea437f>] qrtr_sendmsg+0x1e0/0x2a0 [qrtr]
    [<000000008bddbba4>] sock_sendmsg+0x5b/0x60
    [<0000000003beb43a>] qmi_send_message.isra.3+0xbe/0x110 [qmi_helpers]
    [<000000009c9ae7de>] qmi_send_request+0x1c/0x20 [qmi_helpers]

Change-Id: If032d223388286557df7e689c2a003705b8f38db
Signed-off-by: Carl Huang <cjhuang@codeaurora.org>
Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org>
2021-02-03 12:29:14 +05:30
Rohith Kollalsi
6e88d253e4 usb: phy: qusb: Use scm call to update LVL_SHIFTER register
QUSB2PHY_LVL_SHIFTER is required to be updated to clamp the
signals from the QUSB PHY. And for certain platforms
this register is secured. Hence, use the scm_call to
do a secure write to the register.

Change-Id: I161ffe857795759083cf13cfa98ec78ca97f5fdb
Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
Signed-off-by: Rohith Kollalsi <rkollals@codeaurora.org>
2021-02-03 10:47:20 +05:30
Prateek Sood
ece488e566 pinctrl: qcom: disable MPM_WAKEUP_INT_EN bits for gpio
BY default MPM_WAKEUP_INT_EN bits are set from firmware
for gpios which can have wakeup capability. This results
in wakeup capability set for a gpio which is not being used
as IRQ. Problem manifests as spurious interrupts coming to
GIC from PDC as MPM_WAKEUP_INT_EN registers bit corresponding
to gpio is set.

Fix this by disabling wakeup capability for gpio not being
used as IRQ. When client driver calls irq_set_irq_wake()
after requesting gpio as irq, enable wakeup capability.

Change-Id: Ie215f2fdd36483b133b17ec8162c7423a7d8db31
Signed-off-by: Prateek Sood <prsood@codeaurora.org>
2021-02-03 09:22:14 +05:30
Hemant Kumar
e056332148 pci: switch: Add snapshot of PCIe switch driver
Add snapshot for switch driver stack from msm-4.14.c4 commit
ad8af976b4ab6 ("regulator: qpnp-lcdb: Disable step voltage ramp
for PM8150L V3").

Change-Id: I184823baa47f21c93e8bd6cc60c17fe790b92cfa
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2021-02-02 19:22:24 -08:00
Subbaraman Narayanamurthy
8d831fcdcd soc: qcom: pmic_glink: Fix a race condition in accessing rx_list
Currently, rx_list is updated from pmic_glink_rpmsg_callback()
with the new message received and the workqueue is queued for
pmic_glink_rx_work() to deliver it to the client. However, there
is a possibility that a race condition can occur when this list
is manipulated from pmic_glink_rpmsg_callback() in interrupt
context and pmic_glink_rx_work() from process context. Fix it by
using rx_lock before using list_* in pmic_glink_rx_work().

Change-Id: Ib10671d89d60e4b33f1a9666f4af08bb09d1a53b
Suggested-by: Chris Lew <clew@codeaurora.org>
Suggested-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2021-02-02 17:54:04 -08:00
Laisheng Hu
b7a199ae9f msm: cvp: Add snapshot of fastcvpd driver
Add fastcvp driver, which exposes APIs to video driver
to share HFI command queue address to CDSP and
handle errors to exit gracefully in case video and
cdsp subsystems restart.
This snapshot was taken as of msm-4.14 with commit
5704525974fc1f3cb3f14d922d4987f35f2dc278.

Change-Id: I2b75e01f88d4bc5a267942e63cab79094ef327b9
Signed-off-by: Laisheng Hu <laisheng@codeaurora.org>
2021-02-02 10:23:26 -08:00
Taniya Das
ef3e802b37 clk: qcom: clk-rcg2: Add support for duty-cycle for RCG
Update duty-cycle of the root clock generator based on the desired
duty-cycle from the consumer.

Change-Id: Ia820ec01ff900f60d8f907f48f5d73673dc0f604
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2021-02-02 23:23:03 +05:30
qctecmdr
b7903c2301 Merge "interconnect: qcom: Enable QoS for Yupik" 2021-02-02 06:56:40 -08:00
qctecmdr
3b61092dd4 Merge "net: qrtr: haven: Rearrange init order" 2021-02-02 06:56:39 -08:00
qctecmdr
53446469f9 Merge "net: qrtr: Revert lock sock changes in qrtr_recvmsg" 2021-02-02 06:56:39 -08:00
qctecmdr
a455836680 Merge "input: touchscreen: focaltech: cancel pending resume work" 2021-02-02 06:56:39 -08:00
Saurabh Sahu
6fa611b3df arm: defconfig: Add GCC support for MONACO
Enable Global clock controller for MONACO.

Change-Id: I976c3ab75f498690983c546c77f108aba155b39e
Signed-off-by: Saurabh Sahu <sausah@codeaurora.org>
2021-02-02 20:16:48 +05:30
Saurabh Sahu
a2c13bff12 clk: qcom: gcc: Add support for GCC clock driver for Monaco
Add support for global clock controller for peripheral
clock clients to be able to request for the clocks in
Monaco.

Change-Id: I0dcf82faf9073a7ee832c693540dddbca44e2524
Signed-off-by: Saurabh Sahu <sausah@codeaurora.org>
2021-02-02 20:16:48 +05:30
Xiaowen Wu
8824de2b27 ANDROID: GKI: Enable DRM_GEM_SHMEM_HELPER
DRM_GEM_SHMEM_HELPER will be used for some DRM drivers.

Change-Id: Icd237262787df9aae4ce503f7f2c49b756f330db
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
2021-02-02 01:29:44 -08:00
Ajay Agarwal
4ee28c3cb7 usb: phy: snps: Enable autoresume for FS/HS peripherals only
Currently the driver enables autoresume for all the connected
peripherals. In a case where an LS device is connected but fails
the enumeration, this autoresume enablement is leading to PHY
keeping the Dm pulled up even when the peripheral is detached.
Hence, the detach hs_phy_irq is never fired and disconnect is
not processed.
Since remote wakeup from LS peripherals is not a requirement on
our platforms, enable autoresume for FS/HS devices only.

Change-Id: I0a62d08e58af18b523af322c64529f5183d55907
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
2021-02-01 22:59:05 -08:00
Ajay Agarwal
fe6ad78765 usb: dwc3-msm: Set host mode HSPHY speed flags based on CCS
Currently the driver checks whether the PED bit of the PORTSC
register is set to decide whether any device is connected, and
then checks the PORTSPEED field to check for the speed and
accordingly updates the HSPHY speed flag with LS or FS/HS. Hence,
the PDC is programmed to fire HS_PHY_IRQ only on the rising edge
of Dp/Dm.
In a case where the connected peripheral has failed to enumerate,
the PED bit can be cleared by the host driver. When such a device
is disconnected, there is no HS_PHY_IRQ fired to wakeup SW and
disconnect handling does not happen.
Fix this by setting HSPHY speed flags based on the CCS bit of the
PORTSC register so that the PDC is programmed to fire HS_PHY_IRQ
on the falling edge of Dp/Dm.

Change-Id: I122d170434da19fd6aeb022a5fa8a85f1ea6f541
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
2021-02-01 22:58:44 -08:00
Mayank Grover
625ba320ce drivers: edac: Add support to re-enable edac on cpu hotplug
EDAC ppi interrupts get disabled on cpu hotplug.
Add support to re-enable edac ppi post cpu comes online
during hotplug.

Change-Id: I51455c0134634f03b5e4e83eca915b794dd85067
Signed-off-by: Mayank Grover <groverm@codeaurora.org>
2021-02-02 11:52:53 +05:30
Veera Vegivada
f3936114ce defconfig: sdmsteppeauto: Enable SPMI PMIC drivers
Enable MFD SPMI PMIC driver and several SPMI and PMIC drivers
which are needed to provide baseline support of PMIC peripherals.

Change-Id: I965b40eb0931c2e22e9fab28626e9ca753ad3ff8
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
2021-02-02 11:27:05 +05:30
Sandeep Singh
ab67dcd025 cnss2: Update qdss config file name
Update qdss config file name based on device
type and build type.

Change-Id: I74a9a858707828e3ad9ec5678de4ff2ba56e64ea
Signed-off-by: Sandeep Singh <sandsing@codeaurora.org>
2021-02-02 11:20:53 +05:30
qctecmdr
8e71903aa7 Merge "arm64: defconfig: Enable clock controllers for SM6150" 2021-02-01 21:25:04 -08:00
Prateek Sood
9a721aa325 pinctrl: qcom: Add mpm wakeup control capability in pinctrl
Add support for mpm wakeup control capability, for selective
enable of wakeup capability for GPIO being used as IRQ.

Change-Id: I38f5c8eea4b12919fb95b2135d76579eb4b27247
Signed-off-by: Prateek Sood <prsood@codeaurora.org>
2021-02-02 10:09:27 +05:30
Minghao Zhang
9899d8bfba defconfig: arm64: Enable MAX31760 Fan Controller for Lahaina HHG
Enable MAX31760 Fan Controller for Lahaina HHG.

Change-Id: I1b8d588ee25ff1a788c85b8cfd2cfaf7ffd5858f
Signed-off-by: Minghao Zhang <minghao@codeaurora.org>
2021-02-01 20:22:41 -08:00
Veera Vegivada
22f7eed317 interconnect: qcom: Add qos configuration for scshrike
Enable qos configuration for the interconnect nodes.

Change-Id: Id841c208f9cdca6509fe20b1d846c7202286397e
Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
2021-02-02 09:26:43 +05:30
Mike Tipton
8941f6ff4b clk: qcom: clk-rpmh: Fix overflow in BCM vote
Valid frequencies may result in BCM votes that exceed the max HW value.
Set vote ceiling to BCM_TCS_CMD_VOTE_MASK to ensure the votes aren't
truncated, which can result in lower frequencies than desired.

Change-Id: I6d64815ee93c5c604ec0bea86eca00aca570bb9e
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
2021-02-01 17:50:39 -08:00
Melody Olvera
e6bfca4b0e defconfig: sdxlemur: Enable serial on sdxlemur perf
Enable serial on sdxlemur perf builds.

Change-Id: Ib6740e5c3e7d754457532ccf0918e8ba39bc2e96
Signed-off-by: Melody Olvera <molvera@codeaurora.org>
2021-02-01 15:18:11 -08:00
qctecmdr
503b958af6 Merge "mmc: host: sdhci-msm: Don't clear IO_PAD_PWR_SWITCH when faking 3V support" 2021-02-01 13:34:03 -08:00
qctecmdr
bba3255a66 Merge "soc: qcom: Fixed interrupts not work on sdxnightjar" 2021-02-01 13:34:03 -08:00
qctecmdr
ba929c2d6f Merge "usb: dwc3: Set current accordingly based on type of charger detection" 2021-02-01 13:34:02 -08:00
qctecmdr
3e6e29afed Merge "usb: dwc3: Clear err_evt_seen flag on disconnect" 2021-02-01 13:34:01 -08:00
qctecmdr
08ae823c39 Merge "msm: kgsl: Add GBIF L2 CGC control with A6x CGC" 2021-02-01 13:34:01 -08:00
qctecmdr
6a8be39791 Merge "WLAN subsystem: Sysctl support for key TCP/IP parameters" 2021-02-01 13:34:01 -08:00
qctecmdr
9b3af48029 Merge "power: supply: qcom: Add support to make SMBLITE charger GKI compliant" 2021-02-01 13:34:01 -08:00