A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Author SHA1 Message Date
Taniya Das
fa45c0de3a soc: qcom: smd-rpm: Support new clocks resources 
Add the clock resource ids required to vote from the smd rpm clock
driver.

Change-Id: Ic224d83ea2aacabd26450498b626ebfc687aad04
Signed-off-by: Taniya Das <tdas@codeaurora.org>
 2020-06-07 16:36:51 +05:30
Taniya Das
54d68c324d dt-bindings: clock: Update the SMD-RPM clock ID 
Add and update new clock IDs for SMD rpm clocks.

Change-Id: I46b711ef26fb3995372009a917f6252d4ec87e98
Signed-off-by: Taniya Das <tdas@codeaurora.org>
 2020-06-07 16:36:45 +05:30
qctecmdr
28cf0d0908 Merge "kernel: sound: update codec options with block size" 2020-06-05 08:56:45 -07:00
qctecmdr
ca65ecc5c8 Merge "config: Enable TOS and DSCP target support" 2020-06-05 08:56:44 -07:00
qctecmdr
51baf5ad2c Merge "clk: qcom: clk-rcg2: Add support to print rcg's CMD_DFSR register" 2020-06-05 05:06:33 -07:00
qctecmdr
86bb23c4e5 Merge "dwc3: gadget: Don't block doorbell before halting USB controller" 2020-06-05 05:06:32 -07:00
qctecmdr
a455d70f08 Merge "dwc3-msm: Move override usb speed functionality outside edev check" 2020-06-05 05:06:32 -07:00
qctecmdr
65fbcfac6f Merge "usb: dwc3: gsi: Disable GSI wrapper on clearing run_stop" 2020-06-05 05:06:28 -07:00
qctecmdr
5313030298 Merge "sched: Compile cpu_isolated_mask in SCHED_WALT only" 2020-06-05 05:06:27 -07:00
qctecmdr
9c7599702e Merge "defconfig: arm64: Enable Global clock controller for HOLI" 2020-06-05 05:06:27 -07:00
qctecmdr
25a07ed45c Merge "usb: phy: Reset and initialize HSPHY in host mode when EUD is enable" 2020-06-05 05:06:26 -07:00
qctecmdr
4b99be94b6 Merge "hwmon: Add QTI AMOLED ECM driver" 2020-06-05 05:06:26 -07:00
Sharath Chandra Vurukala
bec8ff53c4 config: Enable TOS and DSCP target support 
Enable TOS and DSCP target support for Holi target

Change-Id: Ib7fbe8442007160f8158f41ba29613fdf1b7fcd1
Signed-off-by: Sharath Chandra Vurukala <sharathv@codeaurora.org>
 2020-06-05 16:16:37 +05:30
qctecmdr
7b7d13e1a5 Merge "drivers: soc: qcom: handle system sleep activities" 2020-06-05 00:39:02 -07:00
qctecmdr
1fa725da96 Merge "clk: qcom: lahaina: Add pll test ctl regs" 2020-06-05 00:39:02 -07:00
qctecmdr
732adf0e7c Merge "clk: qcom: gcc-lahaina: Add USB force_mem_core_on clocks" 2020-06-05 00:39:01 -07:00
qctecmdr
31cb055051 Merge "arm64: configs: Disable DCC console for Lahaina" 2020-06-05 00:39:01 -07:00
qctecmdr
485cd69967 Merge "cpuidle: lpm-levels: Track and predict next rescheduling ipi" 2020-06-04 20:01:38 -07:00
qctecmdr
f071bb5252 Merge "defconfig: lahaina: Enable linux bridge" 2020-06-04 20:01:38 -07:00
qctecmdr
92daa813ad Merge "radio: RTC6226: implement file read for rtc6226 driver" 2020-06-04 20:01:38 -07:00
qctecmdr
6275165e1e Merge "qseecom: Enable APIs only when module is enabled" 2020-06-04 20:01:37 -07:00
qctecmdr
e49657f5cf Merge "radio: RTC6226: remove the V4L2_CAP_DEVICE_CAPS cap as device_caps" 2020-06-04 20:01:37 -07:00
qctecmdr
14e6052999 Merge "proc: update perms of node "reclaim"" 2020-06-04 20:01:37 -07:00
Vivek Aknurwar
0b066d6321 clk: qcom: clk-rcg2: Add support to print rcg's CMD_DFSR register 
Add support to print rcg's CMD_DFSR register. DFS_EN bit 0 of CMD_DFSR
register indicates clk DFS mode.

Change-Id: I5d98550f89bdd14496f94edc455d67f61a1566a4
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
 2020-06-04 15:03:49 -07:00
Vivek Aknurwar
da558fdefd clk: qcom: clk-alpha-pll: Add support to print PLL SSC registers 
Add support to print PLL SSC registers.

Change-Id: Id2f6c19f4a768b3f30370a1b6a573d2b41d1daa9
Signed-off-by: Vivek Aknurwar <viveka@codeaurora.org>
 2020-06-04 15:03:37 -07:00
qctecmdr
c2ac24a1a9 Merge "mhi: core: Read transfer length from an event properly" 2020-06-04 14:48:28 -07:00
qctecmdr
0efc14c3da Merge "mhi: core: Fix out of bound channel id handling" 2020-06-04 14:48:28 -07:00
qctecmdr
5a4580bd6b Merge "abi: Update qcom whitelist for cnss and netif" 2020-06-04 14:48:27 -07:00
qctecmdr
ab1b160dd8 Merge "coresight: etm4x: Fix use-after-free of per-cpu etm drvdata" 2020-06-04 14:48:27 -07:00
Mayank Rana
3e583e6cee usb: phy: Reset and initialize HSPHY in host mode when EUD is enable 
EUD HUB functionality is relevant into USB device mode only. Hence when
using USB host mode, continue performing reset and initialization
functionality with HSPHY even though EUD is enable. If EUD is enable
while starting host mode, re-enable EUD whie exiting host mode.

Change-Id: Ifc2a105d8a02511dd2fc58be5fbc788d46546ba0
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
 2020-06-04 12:21:41 -07:00
Mayank Rana
a05993824c dwc3-msm: Move override usb speed functionality outside edev check 
Currently usb speed override functionality doesn't work as expected
when usb role switch based notification is used. Hence move usb speed
override functionality out side edev check within dwc3_resume_work()
API. Also update maximum_speed as max hw supported speed out side
edev check.

Change-Id: I69b066721490277b77333d2caf820b6c87703501
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
 2020-06-04 12:08:56 -07:00
Elliot Berman
9f125adcf2 sched: Compile cpu_isolated_mask in SCHED_WALT only 
cpu_isolated_mask can only be used when SCHED_WALT is enabled. The
addition of the cpu_isolated_mask causes ABI to break. Thus, compile
references to cpu_isolated_mask only when SCHED_WALT is enabled.

Change-Id: I0982f6431abca807168dbabc4aca74771819565c
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
 2020-06-04 11:42:49 -07:00
Jeevan Shriram
09a7c66654 arm64: configs: Disable DCC console for Lahaina 
Disable ARM JTAG DCC console for Lahaina platform.

Change-Id: Iadd3fc939401d47662ab0ed72411d7fa37b27f6b
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
 2020-06-04 10:58:45 -07:00
Taniya Das
6f76b42f79 defconfig: arm64: Enable Global clock controller for HOLI 
Enable clock controller for HOLI.

Change-Id: Ib3f2f73dc08a530597a52cab202602ace8da6139
Signed-off-by: Taniya Das <tdas@codeaurora.org>
 2020-06-04 23:15:52 +05:30
qctecmdr
766163e7f1 Merge "qbt: Add support for touch events from input framework" 2020-06-04 10:39:49 -07:00
qctecmdr
e47a4e0e2f Merge "bluetooth: Vote VREG_L7E_2P8 from BT driver" 2020-06-04 10:39:49 -07:00
qctecmdr
b6ea26a756 Merge "cnss2: Allow WLAN driver register after cold boot calibration" 2020-06-04 10:39:48 -07:00
qctecmdr
8066095330 Merge "msm: camera: Add camera dt binding definitions" 2020-06-04 10:39:48 -07:00
qctecmdr
277df4ce60 Merge "msm: ADSPRPC: Fix to avoid race condition and use after free" 2020-06-04 10:39:48 -07:00
Taniya Das
d72d303946 Revert "defconfig: holi: Add support for Global clock controller" 
This reverts commit 8ae959a72f.

Change-Id: I04df95da8726f7f415844754b17c0f168d6787fb
Signed-off-by: Taniya Das <tdas@codeaurora.org>
 2020-06-04 23:09:24 +05:30
Mike Tipton
75656695f4 clk: qcom: gcc-lahaina: Add USB force_mem_core_on clocks 
The FORCE_MEM_CORE_ON bits default to 0 and this is fine for most use
cases. However, USB needs FORCE_MEM_CORE_ON=1 to properly retain its
memories when USB APM switches from CX to MX. This can't just be a
one-time setting since the FORCE_MEM_CORE_ON bits need to be set/cleared
upon USB cable connect/disconnect for power optimization. Add fake
clocks to allow the USB client to control them.

Change-Id: Ic7aac944feaa6a956a8892e0cf1f4dd465659302
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
 2020-06-04 10:18:41 -07:00
Mike Tipton
8d1bdc46b2 dt-bindings: clock: Add USB FORCE_MEM_CORE_ON bindings 
Add clock bindings to control the USB FORCE_MEM_CORE_ON bits.

Change-Id: I406e98e1be5b4d6702636c3bfdf738ae9ff12198
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
 2020-06-04 10:16:46 -07:00
qctecmdr
732a1ae2a0 Merge "soc: qcom: dcc: avoid memory access violation" 2020-06-04 06:22:35 -07:00
qctecmdr
5f981341c1 Merge "msm: adsprpc: Fix error code for invalid ioctl" 2020-06-04 06:22:34 -07:00
qctecmdr
a6ec47d805 Merge "haven: touch: add touch notify tag for memory sharing" 2020-06-04 06:22:34 -07:00
qctecmdr
d8294b028a Merge "sched: Improve the scheduler" 2020-06-04 06:22:34 -07:00
qctecmdr
791feec767 Merge "cpufreq: qcom: Set the register for GT Limits Management interrupt" 2020-06-04 06:22:33 -07:00
qctecmdr
f95353fb89 Merge "scripts: gki: Add generic configuration options for defconfig" 2020-06-04 06:22:33 -07:00
qctecmdr
862190e8f9 Merge "clk: qcom: Add API to query corner voltage on given clk frequency" 2020-06-04 06:22:33 -07:00
Sanjana B
377a05f99e kernel: sound: update codec options with block size 
Add block size for dsd in codec options.

Change-Id: I2653cc85ca5a526917d12ef5b2f5d5fa776945a2
Signed-off-by: Sanjana B <sanjb@codeaurora.org>
 2020-06-04 18:18:16 +05:30