Add qcom,msm-hang-detect to device tree to enable MSM Core Hang
Detection on all cores.
Changed from 2 nodes (one for each of silver and gold) to 1 node because
that's semantically correct for the driver.
Change-Id: I10be3a765e20460f43ce4a8cb5e6580d99439f46
Add trace unit power property to ETM. This property indicates
power unit should be power on across power collapse.
Change-Id: Ia6625b2c2fb737950614ef6c0436f523af3ceed4
Add the description for a new property, qcom,retain-regs, which
can be used to specify that retention registers should be
configured to maintain their state after a GDSC is disabled
and re-enabled.
Change-Id: Ic3649de0804d47117bddff72f3713c1ab24e33b2
Add a property to specify the parent supply voltage regulator
which must be enabled during GDSC register configuration.
Change-Id: I62e3f869f8b33faca8838151876420bb08fda601
Globally distributed switch controllers (GDSCs) are used to
switch the power supplied to a particular hardware block within
a Qualcomm Technologies, Inc. SoC on and off. Add gdsc-regulator
device bindings.
Change-Id: Iae47c4fe22c19060d120ef51249b15b20160e0fe
The Always on Processor (AOP) found on Qualcomm Technologies, Inc.
SoCs supports enabling, disabling, and scaling several shared
clocks. These clocks are controlled using the QMP mailbox
protocol. Add device bindings for AOP clock controllers.
Change-Id: I1d0b6c0abad702b2bd50fd2078eedc0907b85214
Device-tree documentation for the fastrpc nodes which contain
properties and IOMMU info for the various context banks and the
CDSP loader driver node which enables loading of firmware images
and bringing the subsystem out of reset during boot-up.
Change-Id: I7b0cc98da6348751d1f0a9d8bc73108cfc901984
Add the IPA device-tree node to communicate with the
Internet Packet Accelerator on Lahaina platform.
Change-Id: I0fdebc9b561a8de9649ef588b6149fe98f888ddb
Add dt-bindings for GENI serial engine driver which provides
common functionality used by other serial bus drivers such
as I2c, SPI, UART), and does resource management for
those drivers.
Change-Id: I81c913f9af208076ed8721ee9cb7e3d17458f446
The ION carveout heap manages the carveouts under its domain
by relying on the assumption that the kernel is aware of this
memory. When the memory is marked as "no-map", the kernel
does not maintain any information about the memory, which
prevents the carveout heap from managing the memory. Thus,
allow for the carveout heap memory to be mapped by the kernel.
Change-Id: I6516d2cd8fcacdb975a3190254e79bbce51e1d24
Add msm_rtb.yaml from a converted msm_rtb.txt from
commit <baa63fa212bd> (Merge "ARM: dts: msm: Add multiple refresh
rates for sw43404") to new yaml format.
Change-Id: I79e61b02578c27048c406af6ee493fab1718a1d4
Add lahaina-usb.dtsi which defines USB controller nodes and no-op
PHY. In addition, add entries for the emulation PHY to
lahaina-rumi.dtsi with overrides to limit the USB instances to
high-speed, peripheral-only.
Change-Id: I987a18c07c5406de3c924fcf03db13a72e9ab2de
To prevent the possibility of running out of stream-matching
entries (SMEs) on the KGSL SMMU in cases where all the SMEs
are required, disable the coherent KGSL IOMMU test device.
Change-Id: I1d1cf1a4530680de91c839d22f057b807765111d
Update the board-id property to include major and minor ids as well
for the bootloader to pick the correct version of devicetree.
Change-Id: I9403d2b2fb88e55db4e68ceea9d884d507167cc7
The QRTR FIFO driver acts as a transport driver between virtual
machines for the QRTR core logic. Document the bindings for the shared
memory region and interrupt resources.
Change-Id: Idbac7a428f0155efc1d4cfbb015cfcfe1b84fb88
The smp2p sleepstate driver is used to notify remote processors of the
power state changes on the local processor. This driver also receives
notifications from remote processors to prevent suspend through smp2p.
Change-Id: I939cc24aab92904726458cfe6e5c6dceb83a3726
QSEE needs to occasionally send sideband signals to APPS userspace. The
qsee_ipc_irq_bridge creates a device node for userspace to poll on and
posts notifications about interrupt and ssr events to this node.
Change-Id: Ia895a1c6e5a31b762d61fef034244f245e1113e6
Interrupts from QSEE are level triggered and are cleared by writing
into a status register. Add the qcom,qsee_irq interrupt chip driver to
abstract this extra work from clients such as GLINK.
Change-Id: I0b2de24dfa2a58b1e076c5b28ad405896cb9c85e
The RPMSG char driver requires clients to ioctl into a ctrl node to
create corresponding userspace char devices. Not all GLINK clients can
follow this standard. Add the GLINK PKT driver to create char devs from
boot time.
Change-Id: I363013b0cb99b8335b8d211ddd0116dfc95522ac
The RPMSG over GLINK transport expects to be a subdev in a remote proc
node. This driver helps probe the glink transports when remote proc is
disabled.
Change-Id: I2b29ad88d347321434470c1d0db365bccc4f1e92
The PIL drivers need to vote for bandwidth across DDR and
crypto subsytem, such that the secure world can perform
initialization and authorization of the firmware blobs.
Hence add a device-tree node indicating the corresponding
interconnect.
Change-Id: If5626ad20638434e39a7d4aa0f02149a72bdaf12
