A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Author SHA1 Message Date
qctecmdr
8a45845cae Merge "ARM: dts: msm: Add devfreq device nodes for SM8150" 2021-01-22 10:04:00 -08:00
qctecmdr
c07256f6da Merge "dt-bindings: Document usage of qcom,ignore-wakeup-src-in-hostmode" 2021-01-22 10:04:00 -08:00
qctecmdr
c20347ff6a Merge "ARM: dts: msm: Add a new pinctrl state for shima" 2021-01-22 10:03:59 -08:00
qctecmdr
9c43a78637 Merge "ARM: dts: msm: Add i2c, spi, uart dtsi nodes for monaco" 2021-01-22 10:03:59 -08:00
qctecmdr
c3ed294422 Merge "ARM: dts: msm: disable tpdm sdcc on holi" 2021-01-21 08:58:49 -08:00
qctecmdr
54f18a979d Merge "ARM: dts: msm: Change QSEE,glink IRQs to level trigger" 2021-01-21 08:58:49 -08:00
qctecmdr
181d1df591 Merge "ARM: dts: msm: update apps smmu interrupt list" 2021-01-21 08:58:49 -08:00
qctecmdr
74ff05de4c Merge "ARM: dts: msm: Add cpuidle states and stats driver nodes for sm6150" 2021-01-21 08:58:48 -08:00
qctecmdr
7718c85e57 Merge "ARM: dts: msm: Early mount of vendor partition" 2021-01-21 08:58:48 -08:00
qctecmdr
760f997b64 Merge "ARM: dts: msm: Update GPU speed bins for yupik" 2021-01-21 08:58:48 -08:00
qctecmdr
7ebbecc2be Merge "ARM: dts: msm: Add bus voting support for sdxlemur" 2021-01-21 04:59:12 -08:00
qctecmdr
860723650d Merge "ARM: dts: msm: Add ion device for sdxnightjar" 2021-01-21 04:59:11 -08:00
qctecmdr
99467727fa Merge "ARM: dts: msm: Disable SDCC TPDMs on shima" 2021-01-21 04:59:11 -08:00
qctecmdr
a771f5892a Merge "ARM: dts: msm: Enable dcc for yupik" 2021-01-21 04:59:11 -08:00
qctecmdr
965722a2bc Merge "ARM: dts: msm: Add necessary changes for CQE enablement on sdxlemur" 2021-01-21 04:59:11 -08:00
qctecmdr
0c83230fef Merge "ARM: dts: msm: Enable dlct tpdm on yupik" 2021-01-21 04:59:11 -08:00
qctecmdr
2afd940a01 Merge "ARM: dts: msm: Add devfreq-cpufreq for SDXNIGHTJAR target" 2021-01-21 04:59:11 -08:00
qctecmdr
250c79a85f Merge "dt-bindings: ufs: Add compitable string for V3 UFS PHY on SM6150" 2021-01-21 01:09:19 -08:00
qctecmdr
0700ac021c Merge "ARM: dts: msm: Limit max-frequency for eMMC and SD card" 2021-01-21 01:09:18 -08:00
qctecmdr
807d0c5121 Merge "ARM: dts: msm: Update max bus vote range for Holi" 2021-01-21 01:09:18 -08:00
qctecmdr
d6ba780f2b Merge "ARM: dts: msm: Add thermal zone entries for pm8195" 2021-01-21 01:09:18 -08:00
Shreyas K K
3e59222b67 ARM: dts: msm: Add devfreq device nodes for SM8150 
Add bw_hwmon, memlat and compute devfreq device nodes
along with other dependent nodes for SM8150.

Change-Id: I106af39a7dc8199101931ed4d9d0a3eb404f6006
 2021-01-21 14:30:36 +05:30
Prudhvi Yarlagadda
f86c0a00c6 ARM: dts: msm: Add i2c, spi, uart dtsi nodes for monaco 
Add i2c, spi, uart, common driver and gsi dtsi nodes for monaco.

Change-Id: If1ce82a647e4302f0162b1c17507721c19157da9
 2021-01-21 10:27:44 +05:30
Sarthak Garg
b178f62b88 ARM: dts: msm: Add necessary changes for CQE enablement on sdxlemur 
Add necessary changes for CQE enablement:

1) Add gpio based data lines (DAT[4:7]) to pinctrl file
2) Set VI recommended drive strength values for clk, cmd and data lines
3) Add clk scaling device tree support
4) Add CQE device tree flag.

Change-Id: I3f616cc73a0cd91029e19ee5160a6c9ba847c0ac
 2021-01-20 17:32:15 +05:30
qctecmdr
1ba5560f7f Merge "ARM: dts: msm: Map more no of redistributors for monaco" 2021-01-20 03:11:32 -08:00
Tao,Zhang
80d0275371 ARM: dts: msm: Enable dlct tpdm on yupik 
DLCT tpdm has been validated and enable it on yupik.

Change-Id: Iecf88520c84b5bc1a01d4b7ec0945473b4c78f59
 2021-01-20 17:31:47 +08:00
Veera Vegivada
580684a5a9 ARM: dts: msm: Add thermal zone entries for pm8195 
Add thermal zones for pm8195 and update pm8155 thermal
zone entries.

Change-Id: I33d777186d8909506393aebadabded06e6be57f3
 2021-01-20 08:00:47 +05:30
Sarthak Garg
371da5c039 ARM: dts: msm: Add bus voting support for sdxlemur 
Add bus voting support for eMMC/SD card for sdxlemur.
Also add clk scaling support.

Change-Id: I1b4e725233dca4350e4834a1fa62c4dbe127a51a
 2021-01-19 20:11:30 +05:30
Tao,Zhang
149fd91ae5 ARM: dts: msm: Change some coresight component names 
Change some coresight component names, and make them corresponding
to the names on IPCAT.

Change-Id: I4e9b18206db6483ded14ca051a1f5cd43ab61474
 2021-01-19 16:31:22 +08:00
Tao,Zhang
4686f48654 ARM: dts: msm: Disable SDCC TPDMs on shima 
Disable all SDCC TPDMs on shima first since there is SDCC internal
clock issue.

Change-Id: Iac18333769fa593a407b10eeed830e728d475c1a
 2021-01-19 15:52:51 +08:00
Shaik Sajida Bhanu
3f7ca5d828 ARM: dts: msm: Limit max-frequency for eMMC and SD card 
Limiting max frequency for eMMC and SD card on kernel v5.4 based devices
to avoid lower speed modes running with high clock rates.

Change-Id: I91708def607a6a009a760dba5703158b0596ee34
 2021-01-19 11:38:16 +05:30
Maulik Shah
fcc0df464c ARM: dts: msm: Add cpuidle states and stats driver nodes for sm6150 
Add LPM cpuidle states and stats driver nodes.

Change-Id: Icf184cd3370c76192797b58c2909ca388c3b0bf1
 2021-01-18 20:33:07 +05:30
Maulik Shah
095fb43fb4 ARM: dts: msm: Add cmd_db, RSC and PDC devices for sm6150 
This change adds three items.

	1. cmd_db reserved memory area
	2. apps and display RSC devices
	3. PDC irqchip device

cmd_db and RSC devices are required for communication with AOSS.
PDC irqchip is required to wakeup device from deep sleep low power
modes.

Change-Id: Idae1cf07113978e66300954809e624d7289c7717
 2021-01-18 20:30:30 +05:30
Chandrasekhar Mattaparthy
16e982f201 ARM: dts: msm: Early mount of vendor partition 
Add support to early mount vendor partition from device tree. This is
required so that vendor modules can be loaded during early-init.

Change-Id: I7700c1fd600b81f8c4665e8be50237db56713ab6
 2021-01-18 20:03:01 +05:30
Pankaj Gupta
9747404611 ARM: dts: msm: Update GPU speed bins for yupik 
Update the clock plan and speed bin value to support
GPU speed bins for Yupik.

Change-Id: I2a98bf68738e06710f2d3593d8aed75d18f9ba08
 2021-01-18 13:54:32 +05:30
Qingqing Zhou
f4e5232e52 ARM: dts: msm: Add ion device for sdxnightjar 
Describe the available ion heaps.

Change-Id: Ib6802ad7e58416db766923020aa4bbc2a04aa06d
 2021-01-18 15:17:53 +08:00
qctecmdr
30e45aae7c Merge "ARM: dts: msm: Add support for Moselle (WCN6750)" 2021-01-16 01:21:48 -08:00
qctecmdr
5b60b62225 Merge "ARM: dts: msm: Add cooling-cells property in mdss_mdp device for yupik" 2021-01-16 01:21:48 -08:00
qctecmdr
a0e89098f6 Merge "ARM: dts: qcom: enable fan controller for Lahaina HHG" 2021-01-16 01:21:48 -08:00
Nagireddy Annem
e1f0189559 ARM: dts: msm: Map more no of redistributors for monaco 
As GIC is configured with more no of cores, So map all region
of available redistributor, change monaco soc id and also
correct syntax errors due to merge conflict.

Change-Id: I832e4e4de9e74b2cdf9a20d1224f8e9a5f3ab7eb
 2021-01-16 11:45:38 +05:30
qctecmdr
cc22cf6c1b Merge "ARM: dts: msm: remove kgsl smmu interconnect node for Lahaina" 2021-01-15 21:44:15 -08:00
qctecmdr
e7ae075180 Merge "ARM: dts: msm: Add device node for llcc node on SDMSHRIKE" 2021-01-15 21:44:15 -08:00
qctecmdr
50383ed358 Merge "ARM: dts: msm: Add thermal zones for pm2250" 2021-01-15 21:44:15 -08:00
qctecmdr
98a362ea04 Merge "ARM: dts: msm: Rectify DT flags and GPII mask for TUI VM usecase" 2021-01-15 15:25:46 -08:00
Manikandan Mohan
669c736845 ARM: dts: msm: Add support for qca6490 xo clk gpio 
QCA6490 needs XO clock selection gpio for leakage prevention. Add
GPIO configuration in cnss device tree node.

Change-Id: I827f7335cf5b507c04d286b9bd7e3bcb95c071ed
 2021-01-15 10:45:41 -08:00
Mahesh Kumar Sharma
00d232ff79 ARM: dts: msm: Add entry to handle XO clock gpio 
In order to avoid leakage, GPIO 201 mapped to XO clock
needs to be pulled high for 2 ms and pull it low to prevent
leakage. Add an entry for GPIO201 in lahaina pro overlay files.

Change-Id: I5311bf9bcd4bd624a46cce2a62ac65551fd76f06
 2021-01-15 10:36:12 -08:00
sganda
31f7661e9e ARM: dts: msm: Change QSEE,glink IRQs to level trigger 
Change the IRQ handlers from EDGE to level trigger
to prevent missing rapid IRQs from SPU.

Change-Id: I1b0a862edf26ca2540591ba866adb6498dd51b43
 2021-01-15 19:18:58 +05:30
Shreyas K K
c97537f9ec ARM: dts: msm: Add device node for llcc node on SDMSHRIKE 
Add device node for last level cache controller on
SDMSHRIKE target.

Change-Id: I33ef1895e9228cf897942051eb1f7fd7596d79a1
 2021-01-15 15:49:47 +05:30
Vivek Kumar
3f45d6a476 ARM: dts: msm: Add device node for llcc on sm8150 
Add device node for last level cache controller
on SM8150.

Change-Id: I408fa74757a016ac57263f292a14e134bab33697
 2021-01-15 15:49:07 +05:30
qctecmdr
23da3223bd Merge "ARM: dts: msm: Add support for ddr scaling on sdxlemur" 2021-01-15 02:01:43 -08:00