Remove the software workaround to manually manage
the phy PLL. Keep the phy PLL on all the time by
disabling L1SS sleep. This is required to prevent
PCIe link down issue upon exiting the L1SS sleep.
Change-Id: I6251f05d1ae0572b958740460606e3eeb51c59ed
Dummy clock nodes are required for clocks client to request, so add
support for the same. Also add the dummy GDSCs required by clients.
Change-Id: I395914138a6ce3bd0b4d1467100d6bd9a53c6198
Add snapshot of smb1355 documentation from msm-4.19 as of commit
4745c65c1ea6 ("Merge dts: msm: Add CX based mitigation thermal zone
rules for kona").
Change-Id: I82d4825f5933117511b44657e9d26f2a5e661a4d
Add binding documentation for SMB1398 charger, which can work
in DIV2 charge pump mode as downstream chargers or combo mode
as a pre-regulator.
This is a snapshot from msm-4.19 commit 83784b9c3513
("dt-bindings: Add property to keep display reset gpio pin
high").
Change-Id: I96d552224f6384c68fce1398e14159c46c257210
Add VADC and ADC_TM nodes for thermistor channels for PM8350, PM8350b,
PMK8350 and PMR735b on shima. Add corresponding thermal zones for
thermistors.
Change-Id: I841bd1de77a536e2d2c0840720043e7113833a96
Add device node for mpm2 sleep counter which is required
for the boot stats KPI reporting on sdxpoorwills target.
Change-Id: Iefe63a80d86abcfb53a734c4d635683e2c1ca65d
Add device tree entries for initializing RTB logging driver and trace
register access which helps during debugging on sdxlemur target.
Change-Id: I317aaa6a3787843ccb3ba808002e10cd4a889df5
Add required device tree node for enabling watchdog timer to reset the
device incase of software fault.
Change-Id: I214aab79bfb88fdf5f33ae92581a9d5c6b09b24f
Update PS_HOLD and TCSR_BOOT_MISC_DETECT register offset for the restart
node to enter into download mode and restart.
Change-Id: I9c9938b5ed4a8c3c781e12ea021f20adafd8f6a5
Add top level SPMI slave devices for PMK8350, PM8350, PM8350C,
PM8350B and PMR735B PMICs.
Add support for managing the PM8008I and PM8008J chips via I2C.
This ensures that consumers are able to modify the physical state
of these PMIC regulators.
Change-Id: I0f94cd804cdfae9d6feee56981891430c3bb2156
Add clock_camcc node with V2 specific compatibility string used to
fix up differences in clock data for Lucid PLL 5lpe configs.
Change-Id: I31f2c0cb6c51bc72aebe93ab86e91c2db7a66c90
