Commit graph

1,508 commits

Author SHA1 Message Date
Sahitya Tummala
d8401f7d8f ARM: dts: msm: Add rmtfs_sharedmem support for Holi
Add shared memory support to enable the rmt_storage service
in userspace that allows other processor to access the primary
storage device to store its data.

Change-Id: Ie9aa53291e2cfb3f5249d76a0f2a12e33751ea21
2020-07-07 10:38:38 +05:30
Sahitya Tummala
13939dada5 ARM: dts: msm: Add rmtfs_sharedmem support for Shima
Add shared memory support to enable the rmt_storage service
in userspace that allows other processor to access the primary
storage device to store its data.

Change-Id: I840d74076c25e1e73ba187fccce28628b8356196
2020-06-29 14:07:57 +05:30
qctecmdr
0bb9cb67e9 Merge "ARM: dts: msm: Add camcc clock node for Lahaina V2" 2020-06-22 18:20:36 -07:00
Vivek Aknurwar
c5aa4942c9 ARM: dts: msm: Add camcc clock node for Lahaina V2
Add clock_camcc node with V2 specific compatibility string used to
fix up differences in clock data for Lucid PLL 5lpe configs.

Change-Id: I31f2c0cb6c51bc72aebe93ab86e91c2db7a66c90
2020-06-22 16:28:00 -07:00
qctecmdr
d9af042b02 Merge "ARM: dts: msm: Add UFS support for holi" 2020-06-22 15:53:18 -07:00
qctecmdr
2e7b72d780 Merge "ARM: dts: msm: Add support for MMNOC TBU MDP0, MDP1, SF1 GDS" 2020-06-22 04:56:59 -07:00
Nitin Rawat
ddf73d27c5 ARM: dts: msm: Add UFS support for holi
This change adds UFS support for holi platform.

Change-Id: Iaeafd650e890d3d97c7cf70f28d4ec47d89f08b7
2020-06-22 06:20:26 +05:30
qctecmdr
94a849a7ee Merge "ARM: dts: msm: remove memory node" 2020-06-20 13:12:13 -07:00
qctecmdr
7363543762 Merge "ARM: dts: msm: add fts node in trustedvm devicetree" 2020-06-20 13:12:13 -07:00
qctecmdr
af34396d74 Merge "ARM: dts: qcom: Update USB settings for L1 LPM on Lahaina" 2020-06-20 08:21:46 -07:00
Murali Nalajala
21aa09087d ARM: dts: msm: remove memory node
Remove memory node from SVM device tree. This node is now dynamically added
by hypervisor as part of SVM booting.

Change-Id: I304687bec18acae45bf518a4ef260132678ce9c8
2020-06-19 12:55:49 -07:00
Murali Nalajala
dd956b9d8d Revert "ARM: dts: msm: Add RM(Resource Manager) device for the trusted VM"
This reverts commit a00d39d0a8.
Hypervisor node is now dynamically added by hypervisor and do
not need to maintain in the device tree.

Change-Id: I77cded8e446cd1ff3bc834217ee7b692b8740595
2020-06-19 12:40:15 -07:00
qctecmdr
ef0dc7cd3b Merge "ARM: dts: msm: Add SMMU actlr configuration for holi" 2020-06-19 09:50:05 -07:00
qctecmdr
cbcf21f697 Merge "ARM: dts: qcom: add wireless firmware name for Lahaina platforms" 2020-06-18 18:45:14 -07:00
qctecmdr
ee8b68925c Merge "ARM: dts: msm: Update PCIe0 PHY settings to v0.99 for lahaina v1" 2020-06-18 18:45:14 -07:00
qctecmdr
8b2cb9ea0c Merge "ARM: dts: msm: Add qcom,labels for trustedvm" 2020-06-18 15:30:54 -07:00
qctecmdr
0ff87cffc9 Merge "ARM: dts: qcom: Add RPMh controlled PMIC regulators for shima" 2020-06-18 07:41:44 -07:00
qctecmdr
c57fb4ed5b Merge "ARM: dts: msm: Add bus interconnect property for cdsp" 2020-06-18 07:41:44 -07:00
Mukesh Ojha
5c5dda42da ARM: dts: msm: Add bus interconnect property for cdsp
Update cdsp node with interconnect property.

Change-Id: I122824187dd6cfe4dc490604be3ad24b64b4414c
2020-06-18 05:13:02 -07:00
Mukesh Ojha
85c149550c ARM: dts: msm: Add support for SCM PAS
The PIL drivers need to vote for bandwidth across DDR and
crypto subsytem, such that the secure world can perform
initialization and authorization of the firmware blobs.
Hence add a device-tree node indicating the corresponding
interconnect.

Change-Id: I143d30b2744dfe11d43908a7a01f006cc9115f21
2020-06-18 05:12:26 -07:00
qctecmdr
486ad4d8d0 Merge "ARM: dts: msm: Updates actlr settings for Shima" 2020-06-18 04:30:08 -07:00
qctecmdr
87b689ac90 Merge "ARM: dts: msm: add clocks for shima gfx smmu" 2020-06-18 04:30:08 -07:00
qctecmdr
106cae24d0 Merge "ARM: dts: msm: qdss clock support for llcc lahaina" 2020-06-18 04:30:08 -07:00
Tony Truong
ace3e120a2 ARM: dts: msm: Update PCIe0 PHY settings to v0.99 for lahaina v1
Update PCIe0 PHY settings to version 0.99 based on hardware
recommendation for lahaina v1.

Change-Id: I8b5bf41d88f7296bfdb4bc89a5415a803cbaafc2
2020-06-17 18:35:59 -07:00
Jagadeesh Kona
3f4f4ec249 ARM: dts: msm: Add support for MMNOC TBU MDP0, MDP1, SF1 GDS
Add support for MMNOC TBU MDP0, MDP1, SF1 GDS.

Change-Id: Ib2a391e01cfc66a3c299f5b228f8119771bc8344
2020-06-17 18:36:35 +05:30
qctecmdr
532ceeec29 Merge "ARM: dts: msm: add sys-pm-violators device for lahaina" 2020-06-17 02:00:26 -07:00
Prakash Gupta
6c4c214ead ARM: dts: msm: Add SMMU actlr configuration for holi
Add ACTLR configuration for SMMU for holi

Change-Id: I04903cf99409a377918cd082b21ac82a58f03bb6
2020-06-17 12:02:37 +05:30
Kiran Gunda
b387f36f32 ARM: dts: qcom: Add RPMh controlled PMIC regulators for shima
Add rpmh-regulator device nodes for the PMIC PM8350, PM8350C,
and PMR735B regulators. This ensures that consumers are able to
modify the physical state of these PMIC regulators.

Change-Id: Ie6be83e018ed7a13eac9e93743302410c0544075
2020-06-16 20:22:07 -07:00
Faiyaz Mohammed
32b6752f38 ARM: dts: msm: Updates actlr settings for Shima
Update actlr settings for gfx and apps smmu for Shima, inline
with smmu hsr.

Change-Id: I4f11da907f8485998fac02a479b16340729798e3
2020-06-17 08:42:58 +05:30
Chris Lew
b9e55a3136 ARM: dts: msm: Add qcom,labels for trustedvm
Add the qcom,label properties to the reserved memory region nodes in
the trustvm so RM can match up the nodes to the hyp assigned memory
through the assigned labels from lookup_sgl.

Change-Id: Iba2abbbf2a8d7335306d9466fc27caad55af72a5
2020-06-16 12:57:43 -07:00
Prakash Gupta
bcefc0bb6c ARM: dts: msm: initial arm smmu DT for holi
Initial arm smmu DT for apps and gfx smmu for holi.

Change-Id: If5c8e8c5cbae25f4543048b1396de0e3a18a3576
2020-06-16 08:01:34 -07:00
Jack Pham
ff0f02fa29 ARM: dts: qcom: Update USB settings for L1 LPM on Lahaina
The USB controller supports link power management (L1 LPM) for
high speed. Remove the "snps,dis_enblslpm_quirk" property which
disables that feature. While there, clean up the "snps,hird-threshold"
value as that is only supposed to be 4-bits; the 5th bit is set by a
separate property "snps,is-utmi-l1-suspend". These will allow for
maximum power savings when connected in USB 2.0 mode and L1 LPM
is supported for both host and peripheral modes.

Finally, remove the unused "usb-core-id" properties.

Change-Id: Ib9dc3a9c27d9a0f56dd0c75c8b7389ac44c9a7cb
2020-06-15 17:35:16 -07:00
qctecmdr
24ef0df956 Merge "ARM: dts: msm: add PMIC Glink and clients for shima" 2020-06-15 09:59:40 -07:00
Kiran Gunda
82aef10735 ARM: dts: msm: add PMIC Glink and clients for shima
Add PMIC Glink device and their client devices. PMIC Glink device
with name PMIC_RTR_ADSP_APPS supports the clients UCSI, battery
charger etc. PMIC Glink device with name PMIC_LOGS_ADSP_APPS
supports the client battery debug device.

Change-Id: Icf6dae33dfcc361701e1684274e3749431d451a0
2020-06-15 07:06:10 -07:00
Kiran Gunda
456ff01d6c ARM: dts: msm: add SPMI debug bus for shima
Add an SPMI debug bus device and associated child devices so that
consumers can have unrestricted access to the PMICs on
pre-production devices.  This helps to make debugging easier.

Change-Id: Id534051fef71eb84fbea3dc8976ecb2cbd9eff47
2020-06-15 07:05:37 -07:00
qctecmdr
684d812354 Merge "ARM: dts: msm: Update iommu-fault model values with new values" 2020-06-15 06:15:37 -07:00
qctecmdr
bb51082526 Merge "ARM: dts: msm: Add dcc node for shima" 2020-06-15 06:15:37 -07:00
qctecmdr
3c0d3b477f Merge "ARM: dts: msm: Add throttle clk support for shima" 2020-06-15 06:15:37 -07:00
qctecmdr
0d8b9df659 Merge "ARM: dts: qcom: Add dtsi node entry for Slimbus in shima" 2020-06-15 06:15:37 -07:00
qctecmdr
cdf7ddb346 Merge "bindings: clock: Add support for RPMCC for HOLI" 2020-06-15 06:15:37 -07:00
qctecmdr
2ff3f04d38 Merge "Revert "ARM: dts: msm: Enable cnss daemon support"" 2020-06-15 02:08:37 -07:00
Taniya Das
4970d8d7c5 bindings: clock: Add support for RPMCC for HOLI
RPMCC clock node is required for HOLI.

Change-Id: Ia6084f1647515d95ba660a8faa00b556dd6cc20d
2020-06-15 12:45:11 +05:30
qctecmdr
54646fab41 Merge "ARM: dts: msm: Add DT flags for TUI usecase on lahaina" 2020-06-14 20:37:54 -07:00
qctecmdr
f81e3661c3 Merge "ARM: dts: msm: Set PPG ramp step duration to 100 ms" 2020-06-14 11:32:30 -07:00
qctecmdr
f150097f1b Merge "ARM: dts: msm: Update QMP Phy init sequence for Lahaina to v1.09" 2020-06-14 11:32:30 -07:00
qctecmdr
94fad7e985 Merge "ARM: dts: msm: Update PCIe1 PHY settings to v1.04 for lahaina" 2020-06-14 11:32:30 -07:00
qctecmdr
24f21e990e Merge "ARM: dts: qcom: fix memory node address and enable scm driver" 2020-06-14 04:58:08 -07:00
qctecmdr
237351f744 Merge "ARM: dts: msm: Add pm6350 and pm6150l rpm-smd regulators for holi" 2020-06-14 04:58:08 -07:00
Avinash Philip
516044be3c ARM: dts: msm: qdss clock support for llcc lahaina
Add qdss clock support for llcc perfmon module functionality in
lahaina.

Change-Id: I9b6d1a9bad4d03d33f443a41d0cd20707a339755
2020-06-14 15:15:58 +05:30
Avinash Philip
680139da53 dt-bindings: msm: llcc: Add support for QDSS clock
Add support for qdss clock for enabling llcc performance monitor
module functionality.

Change-Id: I17508083ebb6744ca0cad01ea6d23fbb3ec72369
2020-06-14 15:15:52 +05:30