A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Author SHA1 Message Date
Ziqi Chen
104f3bbdb8 ARM: dts: msm: Change cd-gpio polarity setting for HDK lahaina 
According to HDK Lahaina HW design, the logic level of cd-gpio is
HIGH with card and is LOW without card. Set cd-gpio flag to
GPIO_ACTIVE_HIGH for high active card installed interruption.

Change-Id: Icb20ea9f0cdcac57512be2fd53cf61181ccf2066
 2020-09-21 14:36:04 +08:00
qctecmdr
9fd9b2e6e0 Merge "ARM: dts: msm: change OVERRIDE_X1 according hardware change of lahaina QRD" 2020-09-01 21:42:14 -07:00
qctecmdr
b090149687 Merge "ARM: dts: msm: Add support for ION for the shima-VM" 2020-09-01 21:42:14 -07:00
Linyu Yuan
d1343f7b35 ARM: dts: msm: change OVERRIDE_X1 according hardware change of lahaina QRD 
USB2 hardware changed and update parameter according.

Change-Id: Iddc1920b5c2bbe87949d5c8d6284f39829180ebc
 2020-09-02 10:17:25 +08:00
qctecmdr
70c014e079 Merge "ARM: dts: msm: Add ice core clock node for holi" 2020-09-01 17:18:52 -07:00
qctecmdr
d2e8211abb Merge "ARM: dts: msm: Disable lpm" 2020-09-01 17:18:52 -07:00
qctecmdr
68792a4de3 Merge "ARM: dts: msm: Add ice core clock node for shima" 2020-09-01 17:18:52 -07:00
qctecmdr
28c4e26499 Merge "ARM: dts: msm: Add support for performance lock on HOLI" 2020-09-01 17:18:52 -07:00
qctecmdr
b3990d9115 Merge "ARM: dts: msm: PMIIC regulator and platform update for shima" 2020-09-01 14:37:02 -07:00
qctecmdr
1fc39937db Merge "ARM: dts: msm: add cluster power down state for Trusted VM" 2020-09-01 14:37:02 -07:00
qctecmdr
b2882b7036 Merge "ARM: dts: msm: Add GPU_CPR register space" 2020-09-01 14:37:02 -07:00
qctecmdr
2fe155c761 Merge "ARM: dts: msm: Add secure carveout ION heaps for Shima" 2020-09-01 11:50:47 -07:00
Kiran Gunda
da433f3fd2 ARM: dts: msm: PMIIC regulator and platform update for shima 
1. Reduce the min-voltage of L1I, L2I, L5I, L1J, L2J and L3J to
   align with the respective parent min-voltages to avoid the higher
   voltage vote during the LDO disable which leads to higher
   power numbers.
2. Change the min-voltage of SMPS9B as per the HW recommendation.
3. Disable PM8008 and flash led nodes for shima ATP as these are
   not supported for ATP platform.

Change-Id: I0b9aa510ec23a7a16b5cdc50bfd059ad0e4bc002
 2020-09-01 10:39:52 -07:00
Lina Iyer
6d6fbd1449 ARM: dts: msm: add cluster power down state for Trusted VM 
Add cluster idle state for Trusted VM. Since the Trusted VM does cpuidle
using Platform Coordinated PSCI mode, specify the cluster power down as
a idle state in the CPU node.

Change-Id: I245530ac738ab7e35e9bd5c5d81e58a93eb178fa
 2020-09-01 11:31:46 -06:00
qctecmdr
77e0aebe94 Merge "ARM: dts: msm: Correct PWM-LPG base addresses for PM6150l" 2020-09-01 09:04:13 -07:00
qctecmdr
66f81bcdf4 Merge "ARM: dts: qcom: Update pm7250b alram sensor thermal config for HOLI" 2020-09-01 09:04:13 -07:00
qctecmdr
73825d4c8d Merge "ARM: dts: msm: add property to detect wcd937x in soundwire master" 2020-09-01 09:04:13 -07:00
qctecmdr
3d753d5e18 Merge "ARM: dts: msm: Added psci node for sdxlemur" 2020-09-01 09:04:13 -07:00
Tushar Nimkar
03d42963f9 ARM: dts: msm: Added psci node for sdxlemur 
This changes adds psci node to devicetree and enable psci
driver to initialize.

Change-Id: I1f31d5ced3d0867c2862ea09187da780e512459a
 2020-09-01 05:35:29 -07:00
qctecmdr
a589fdf7fc Merge "ARM: dts: msm: Enable TCSR enable check for EUD" 2020-09-01 03:34:50 -07:00
qctecmdr
ca0ee10383 Merge "ARM: dts: msm: Add the interrupts for the APPS TGU for holi" 2020-09-01 03:34:50 -07:00
qctecmdr
26602fe09a Merge "ARM: dts: msm: Enable L3 interconnect driver for Shima" 2020-09-01 03:34:49 -07:00
qctecmdr
98b46477d5 Merge "ARM: dts: msm: Add support of cma heap" 2020-09-01 03:34:49 -07:00
qctecmdr
2c4ef1b38c Merge "ARM: dts: msm: enable USB1 host mode on lahaina HDK" 2020-09-01 03:34:49 -07:00
Gopala Krishna Nuthaki
c7a22b2cfa ARM: dts: qcom: Update pm7250b alram sensor thermal config for HOLI 
Add pm7250b pmic alram thermal zone mitigation with battery
cooling device.

Change-Id: Icd51766dcbbc78ddaa7fd18e3965454c6dd96473
 2020-09-01 02:16:51 -07:00
Taniya Das
820ee3381c ARM: dts: msm: Add support for performance lock on HOLI 
The cpufreq-hw requires the performance lock registers to be updated in
the cases where the SW DCVS is requested.

Change-Id: I6ac45a577904171a051c84b983363d9a2ea1164d
 2020-09-01 09:29:56 +05:30
Taniya Das
7a315b1690 bindings: cpufreq-hw: Add binding support for performance lock 
Add the new optional binding to support perf-lock for CPU.

Change-Id: Ibbd9aac72666bfe635c9965066cb332d4ecd1ab1
 2020-09-01 09:29:41 +05:30
Faiz Nabi Kuchay
ce7280c09f ARM: dts: msm: Add support of cma heap 
Add support of cma heap for shima.

Change-Id: Iaff7c9fb651d1a99511696f6ce3d9f11e6516c7a
 2020-09-01 00:41:58 +05:30
Jishnu Prakash
00d276a268 ARM: dts: msm: Correct PWM-LPG base addresses for PM6150l 
Remove sizes specified in base addresses of PWM-LPG devices
to follow the convention of msm-5.4 to use base addresses
alone without specifying size.

Change-Id: I7d925f5286701696deb5c472897d6f2bf23f475f
 2020-08-31 22:14:24 +05:30
Odelu Kukatla
7a5fc06936 ARM: dts: msm: Enable L3 interconnect driver for Shima 
Enable L3 interconnect driver so that consumers are
able to obtain their path handles properly.

Change-Id: I088da57a382840050c2c539c97b1b5dc2f5d86b3
 2020-08-31 07:11:32 -07:00
Faiyaz Mohammed
f1545f6467 ARM: dts: msm: Add support for ION for the shima-VM 
Add support for ION, and the trusted UI dynamic carveout
heap, for the shima-VM.

Change-Id: I463d425ab368946f35a5951b76bedd61ab4f3191
 2020-08-31 06:41:37 -07:00
qctecmdr
03417227c2 Merge "ARM: dts: msm: Enable QoS programming for HOLI" 2020-08-31 03:20:21 -07:00
qctecmdr
0f0e94315c Merge "ARM: dts: msm: Enable btfm for shima" 2020-08-31 03:20:21 -07:00
qctecmdr
d7158e1cc0 Merge "ARM: dts: msm: add focaltech touch support for qrd shima" 2020-08-31 03:20:21 -07:00
qctecmdr
f93ed0f9ca Merge "Revert "dt-bindings: Add documentation for USB CSR clk"" 2020-08-31 03:20:21 -07:00
qctecmdr
b02e0e2c3d Merge "ARM: dts: msm: Correct trigger type for EDAC ERP Interrupt" 2020-08-31 03:20:21 -07:00
Raghavendra Kakarla
94acdb1975 ARM: dts: msm: Add the interrupts for the APPS TGU for holi 
Update the APSS TGU node with interrupt numbers and corrected
the number of registers supported.

Change-Id: Idacedd7eea864bc2dfc0d58ec7333d1038a1a1a0
 2020-08-31 12:51:51 +05:30
Vatsal Bucha
e4a51ec4d2 ARM: dts: msm: Enable btfm for shima 
Enable wcn btfm for shima.

Change-Id: I526919f276df9925b6737556a73d0530f8fb217f
 2020-08-30 20:42:51 +05:30
Mayank Rana
9bd9d18666 Revert "dt-bindings: Add documentation for USB CSR clk" 
This reverts commit fb37edde28.

Change-Id: I18857ba512e4fe966f0bfb3ea7f85a1067729c64
 2020-08-29 09:41:26 -07:00
Mayank Rana
7fdda6ba7b Revert "ARM: dts: msm: Add USB CSR clock entry on Lahaina" 
This reverts commit b92c3f5e10.

Change-Id: I51e9650ee26b7a6cdc9ff881174521f5ed246dc4
 2020-08-29 09:41:22 -07:00
Odelu Kukatla
9dcce5494d ARM: dts: msm: Enable QoS programming for HOLI 
Bus driver requires to set the QoS parameters like QoS mode
and priorities, so enable the QoS parameter programming.

Change-Id: Ie6b8c01acbdcd82707d1aff6924be5d28e9e4bbe
 2020-08-29 17:34:06 +05:30
gururaj chalgeri
f3184ed58e ARM: dts: msm: Add secure carveout ION heaps for Shima 
Add the secure carveout ION heaps for shima.

Change-Id: I77a939c1bcec9b36eb154e679f46173b2f1e109a
 2020-08-29 13:12:41 +05:30
qctecmdr
540e981f5e Merge "ARM: dts: msm: Add bcm voter devices for sdxlemur" 2020-08-28 21:18:07 -07:00
qctecmdr
1f6e090622 Merge "ARM: dts: msm: Add support clock AOP for SDXLEMUR" 2020-08-28 21:18:07 -07:00
Vangala, Amarnath
525509cace ARM: dts: msm: add property to detect wcd937x in soundwire master 
With soundwire multi slae configuration changes,
soundwire master needs to identify the salves explicitly.
Add dt property to support wcd slave detection in soundwire master.

Change-Id: I45bc71298423535fff78f424cb790b9d421a79d7
 2020-08-29 06:45:46 +05:30
qctecmdr
d38ed58c17 Merge "ARM: dts: msm: Update the rpm-smd node with proper irq number" 2020-08-28 17:56:36 -07:00
qctecmdr
c0553c875b Merge "ARM: dts: msm: add initial devicetree nodes for PCIe RC on sdxlemur" 2020-08-28 17:56:36 -07:00
qctecmdr
4221df1a23 Merge "ARM: dts: qcom: Update A660 v2 supported power levels" 2020-08-28 14:21:51 -07:00
qctecmdr
14970984c7 Merge "ARM: dts: msm: Upgrade Lahaina's memory map to version 6" 2020-08-28 14:21:51 -07:00
qctecmdr
f2e8078ba6 Merge "ARM: dts: msm: Update PSCI state ID for lahaina" 2020-08-28 14:21:50 -07:00